MPC9443FA IDT, Integrated Device Technology Inc, MPC9443FA Datasheet - Page 7

• Manufacturer Part Number: MPC9443FA
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Dividerr

Specifications of MPC9443FA

• Number Of Clock Inputs: 3
• Output Frequency: 350MHz
• Output Logic Level: LVCMOS
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: LVCMOS/LVPECL
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

Table 11. DC Characteristics (V
Table 12. AC Characteristics (V
IDT™ / ICS™ LVCMOS CLOCK FANOUT BUFFER
1. Input pull-up / pull-down resistors influence input current.
2. The MPC9443 is capable of driving 50 Ω transmission lines on the incident edge. Each output drives one 50 Ω parallel terminated
3. V
4. I
t
1. AC characteristics apply for parallel output termination of 50 Ω to V
2. This table only specifies AC parameter in mixed voltage supply conditions that vary from the corresponding AC tables. For all other
3. t
4. Output pulse skew is the absolute difference of the propagation delay times: | t
Symbol
Symbol
sk(LH, HL)
V
t
I
PLH, HL
MPC9443
2.5V, 3.3V LVCMOS CLOCK FANOUT BUFFER
t
CCQ
t
Z
CMR
sk(PP)
DC
V
C
SK(P)
V
V
V
V
transmission line to a termination voltage of V
(for V
and the input swing lies within the V
parameters, see
I
OUT
CCQ
sk(LH, HL)
IN
OH
OL
PP
PD
IH
IL
CMR
Q
(4)
(3)
is the DC current consumption of the device with all outputs open and the input in its default state or open.
CC
(DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the V
Input High Voltage
Input Low Voltage
Input Current
Output High Voltage
Output Low Voltage
Peak-to-Peak Input Voltage
Common Mode Range
Output Impedance
Power Dissipation Capacitance
Maximum Quiescent Supply Current
Output-to-Output Skew
Device-to-Device Skew
Propagation Delay
Output Pulse Skew
Output Duty Cycle
= 3.3 V) or one 50 Ω series terminated transmission line (for V
includes both device skew referenced to the rising output edge and device skew referenced to the falling output edge.
Table 8
(1)
(for 3.3 V outputs) or
Characteristics
Characteristics
f
Q
Any output, same output divider
(4)
<250 MHz and using PCLK0,1
Any output, any output divider
f
Q
(3)
<140 MHz and using CCLK
CC
CC
PP
= 3.3 V ± 5%, any V
= 3.3 V ± 5%, any V
(DC) specification.
Using PCLK0,1
TT
Table 10
Using CCLK
2.5 V output
3.3 V output
2.5 V output
3.3 V output
2.5 V output
3.3 V output
. Alternatively, the device drives up to two 50 Ω series terminated transmission lines
PCLK0, 1
PCLK0,1
(for 2.5 V outputs).
CCA,B,C,D
CCA,B,C,D
See
See
–0.3
Min
Min
250
2.0
1.7
2.0
1.1
45
45
TT
Table 8
Table 8
.
= 2.5 V ± 5% or 3.3 V ± 5% (mixed), T
= 2.5 V ± 5% or 3.3 V ± 5% (mixed), T
CC
7
=2.5 V).
(3.3 V AC Characteristics)
(3.3 V AC Characteristics)
PLH
Typ
Typ
50
50
22
19
10
– t
PHL
|.
V
V
CC
CC
Max
Max
0.55
275
350
400
500
200
0.8
0.6
3.0
55
55
+ 0.3
– 0.6
MPC9443 REV. 5 SEPTEMBER 19, 2008
Unit
Unit
mV
mA
µA
ps
ps
ps
ps
pF
%
%
Ω
Ω
V
V
V
V
V
A
A
= –40 to +85°C)
= –40 to +85°C)
DC
LVCMOS
LVCMOS
I
I
I
I
LVPECL
LVPECL
Per Output
All V
OH
OH
OL
OL
REF
= 15 mA
= 24 mA
= –15 mA
= 24 mA
CC
Condition
Condition
= 50%
Pins
CMR
(2)
(2)
(2)
(2)
range
(1) (2)