IDT5T93GL16NLI8 IDT, Integrated Device Technology Inc, IDT5T93GL16NLI8 Datasheet - Page 11

• Manufacturer Part Number: IDT5T93GL16NLI8
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of IDT5T93GL16NLI8

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 2.3V
• Operating Supply Voltage (typ): 2.5V
• Operating Supply Voltage (max): 2.7V
• Package Type: VFQFPN
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 52
• Quiescent Current: 350mA
• Lead Free Status / RoHS Status: Not Compliant

IDT5T93GL16 Data Sheet
Glitchless Output Operation with Switching Input Clock Selection
1. When SEL changes, the output clock goes LOW on the falling edge of the output clock up to three cycles later. The output then stays LOW
for up to three clock cycles of the new input clock. After this, the output starts with the rising edge of the new input clock.
2. AC propagation measurements should not be taken within the first 100 cycles of startup.
FSEL Operation for When Current Clock Dies
1. When the differential on the selected clock goes below the minimum DC differential, the outputs clock goes to an unknown state. When this
happens, the SEL pin should be toggled and FSEL asserted in order to force selection of the new input clock. The output clock will start up
after a number of cycles of the newly-selected input clock.
2. The FSEL pin should stay asserted until the problem with the dead clock can be fixed in the system.
3. It is recommended that the FSEL be tied HIGH for systems that use only one input. If this is not possible, the user must guarantee that the
unused input have a differential greater than or equal to the minimum DC differential specified in the datasheet.
IDT5T93GL16 REVISION B AUGUST 27, 2009
Qn - Qn
A
A
2
1
SEL
- A
- A
1
2
11
2.5V LVDS 1:16 GLITCHLESS CLOCK BUFFER TERABUFFER™ II
©2009 Integrated Device Technology, Inc.
+ V
V
- V
+ V
V
- V
V
V
V
+ V
V
- V
DIF
DIF
IH
THI
IL
DIF
DIF
DIF
DIF
DIF
DIF
DIF
= 0
= 0
= 0