MC100ES6222TBR2 IDT, Integrated Device Technology Inc, MC100ES6222TBR2 Datasheet

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MC100ES6222TBR2

Manufacturer Part Number
MC100ES6222TBR2
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Dividerr
Datasheet

Specifications of MC100ES6222TBR2

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Logic Level
ECL/PECL
Operating Supply Voltage (min)
-2.375/2.375V
Operating Supply Voltage (typ)
-2.5/-3.3/2.5/3.3V
Operating Supply Voltage (max)
-3.465/3.465V
Package Type
TQFP
Operating Temp Range
0C to 110C
Operating Temperature Classification
Commercial
Signal Type
ECL/PECL
Mounting
Surface Mount
Pin Count
52
Lead Free Status / RoHS Status
Not Compliant
LOW VOLTAGE, 1:15 DIFFERENTIAL
ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER
most demanding clock distribution systems, the MC100ES6222 supports various
applications that require the distribution of precisely aligned differential clock signals.
Using SiGe technology and a fully differential architecture, the device offers very low skew
outputs and superior digital signal characteristics. Target applications for this clock driver
is high performance clock distribution in computing, networking and telecommunication
systems.
Features
Functional Description
clock frequencies up to 3 GHz. The CLK0 and CLK1 inputs can be driven by ECL or PECL
compatible signals. Each of the four output banks of two, three, four and six differential
clock output pairs can be independently configured to distribute the input frequency or ÷2
of the input frequency. The FSELA, FSELB, FSELC, FSELD, and CLK_SEL are
asychronous control inputs. Any changes of the control inputs require a MR pulse for
resynchronization of the ÷2 outputs. For the functionality of the MR control input, see
Figure 5. Functional
one output is used. In the case where not all ten outputs are used, the output pairs on the same package side as the parts being used on
that side should be terminated.
supports positive (PECL) and negative (ECL) supplies. The MC100ES6222 is pin and function compatible to the MC100EP222.
IDT™ / ICS™ ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER
The MC100ES6222 is a bipolar monolithic differential clock fanout buffer. Designed for
The MC100ES6222 is designed for low skew clock distribution systems and supports
In order to meet the tight skew specification of the device, both outputs of a differential output pair should be terminated, even if only
The MC100ES6222 can be operated from a single 3.3 V or 2.5 V supply. As most other ECL compatible devices, the MC100ES6222
15 differential ECL/PECL outputs (4 output banks)
2 selectable differential ECL/PECL inputs
Selectable ÷1 or ÷2 frequency divider
130 ps maximum device skew
Supports DC to 3 GHz input frequency
Single 3.3 V, –3.3 V, 2.5 V or –2.5 V supply
Standard 52-lead LQFP package with exposed pad for enhanced thermal
characteristics
Supports industrial temperature range
Pin and function compatible to the MC100EP222
52-lead Pb-free Package Available
Diagram.
1
LOW-VOLTAGE 1:15 DIFFERENTIAL
MC100ES6222 REV. 5 FEBRUARY 27, 2008
ECL/PECL CLOCK DIVIDER
AND FANOUT DRIVER
52-LEAD LQFP PACKAGE
52-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 1336A-01
EXPOSED PAD
CASE 1336A-01
EXPOSED PAD
MC100ES6222
TB SUFFIX
AE SUFFIX

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MC100ES6222TBR2 Summary of contents

Page 1

LOW VOLTAGE, 1:15 DIFFERENTIAL ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER The MC100ES6222 is a bipolar monolithic differential clock fanout buffer. Designed for most demanding clock distribution systems, the MC100ES6222 supports various applications that require the distribution of precisely aligned differential ...

Page 2

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER FSELA CLK0 CLK0 ÷ ÷ CLK1 CLK1 V EE CLK_SEL V EE FSELB FSELC ...

Page 3

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Table 2. Pin Configurations Pin I/O CLK0, CLK0 Input ECL/PECL CLK1, CLK1 Input ECL/PECL FSELA, FSELB, Input ECL/PECL FSELC, FSELD MR Input ECL/PECL CLK_SEL Input ECL/PECL QA[0:1], QA[0:1] Output ...

Page 4

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Table 4. General Specifications Symbol V Output Termination Voltage TT MM ESD Protection (Machine Model) HBM ESD Protection (Human Body Model) CDM ESD Protection (Charged Device Model) LU Latch-Up ...

Page 5

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Table 6. ECL DC Characteristics (V Symbol Characteristics Clock Input Pair CLK0, CLK0, CLK1, CLK1 (ECL differential signals) V Differential Input Voltage PP V Differential Cross Point Voltage CMR ...

Page 6

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Table 7. AC Characteristics (ECL: V (PECL: V Symbol Characteristics Clock Input Pair CLK0, CLK0, CLK1, CLK1 (PECL or ECL differential signals) V Differential Input Voltage PP V Differential ...

Page 7

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Differential Pulse Generator Ω CLK CLK Asynchronous Reset Functional Diagram IDT™ / ICS™ ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER = 50 Ω DUT MC100ES6222 ...

Page 8

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Understanding the Junction Temperature Range of the MC100ES6222 To make the optimum use of high clock frequency and low skew capabilities of the MC100ES6222, the MC100ES6222 is specified, characterized ...

Page 9

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Using the Thermally Enhanced Package of the MC100ES6222 The MC100ES6222 uses a thermally enhanced exposed pad (EP) 52 lead LQFP package. The package is molded so the lead frame ...

Page 10

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER 4X 0.2 H A-B D PIN 1 52 INDEX 1.7 MAX 0.40 J 52X 5 0.22 SEATING ...

Page 11

MC100ES6222 LOW VOLTAGE, 1:15 DIFFERENTIAL, ECL/PECL CLOCK DIVIDER AND FANOUT BUFFER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, ...

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