IDT8523BGLF IDT, Integrated Device Technology Inc, IDT8523BGLF Datasheet - Page 2

• Manufacturer Part Number: IDT8523BGLF
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of IDT8523BGLF

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: HSTL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Compliant

Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to intenal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
IDT™ / ICS™ HSTL FANOUT BUFFER
Symbol
C
R
R
ICS8523
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER
IN
PULLUP
PULLDOWN
Number
11, 12
13, 18
14, 15
16, 17
19, 20
8, 9
10
1
2
3
4
5
6
7
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
CLK_SEL
CLK_EN
Q3, Q3
Q2, Q2
Q1, Q1
Q0, Q0
Name
V
GND
CLK
CLK
CLK
CLK
V
DDO
nc
DD
Unused
Output
Output
Output
Output
Power
Power
Power
Input
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown
Pulldown
Pullup
Pullup
Pullup
Test Conditions
Description
Power supply ground.
Synchronizing clock enable. When HIGH, clock outputs follow clock input.
When LOW, Qx outputs are forced low, Qx outputs are forced high.
LVCMOS / LVTTL interface levels.
Clock select input. When HIGH, selects differential PCLK, PCLK inputs.
When LOW, selects CLK, CLK inputs. LVCMOS / LVTTL interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Non-inverting differential LVPECL clock input.
Inverting differential LVPECL clock input.
No connect.
Positive supply pin.
Differential output pair. HSTL interface levels.
Output supply pins.
Differential output pair. HSTL interface levels.
Differential output pair. HSTL interface levels.
Differential output pair. HSTL interface levels.
2
Minimum
Typical
ICS8523CGREV. D MARCH 13, 2007
51
51
4
Maximum
Units
k
k
pF
Ω
Ω