IDT8523BGLF IDT, Integrated Device Technology Inc, IDT8523BGLF Datasheet - Page 9

• Manufacturer Part Number: IDT8523BGLF
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of IDT8523BGLF

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 650MHz
• Output Logic Level: HSTL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Compliant

Differential Clock Input Interface
The CLK /CLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and
other differential signals. Both V
and V
examples for the HiPerClockS CLK/CLK input driven by the most
common driver types. The input interfaces suggested here are
Figure 3A. HiPerClockS CLK/CLK Input Driven by an
Figure 3C. HiPerClockS CLK/CLK Input
Figure 3E. HiPerClockS CLK/CLK Input Driven by
IDT™ / ICS™ HSTL FANOUT BUFFER
ICS8523
LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER
3.3V
LVPECL
R5, R6 located near the driver pin
CMR
1.8V
3.3V
LVPECL
input requirements. Figures 3A to 3E show interface
LVHSTL
IDT
HiPerClockS
LVHSTL Driver
R5
100 - 200
IDT HiPerClockS LVHSTLDriver
Driven by a 3.3V LVPECL Driver
a 3.3V LVPECL Driver with AC Couple
R6
100 - 200
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
SWING
C1
C2
R3
125
R1
50
3.3V
R1
84
and V
R3
125
3.3V
R1
84
R4
125
R2
50
R2
84
R4
125
OH
R2
84
must meet the V
CLK
nCLK
CLK
nCLK
3.3V
3.3V
HiPerClockS
Input
HiPerClockS
Input
CLK
nCLK
3.3V
HiPerClockS
Input
PP
9
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example, in Figure 2A, the input termination applies for IDT
HiPerClockS LVHSTL drivers. If you are using an LVHSTL driver
from another vendor, use their termination recommendation.
Figure 3B. HiPerClockS CLK/CLK Input
Figure 3D. HiPerClockS CLK/CLK Input
3.3V
3.3V
LVDS
LVPECL
Driven by a 3.3V LVPECL Driver
Driven by a 3.3V LVDS Driver
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
Zo = 50Ω
ICS8523CGREV. D MARCH 13, 2007
R1
50
R2
50
R2
50
R1
100
CLK
nCLK
CLK
nCLK
3.3V
3.3V
HiPerClockS
Input
Receiver