ICS8521BY IDT, Integrated Device Technology Inc, ICS8521BY Datasheet - Page 8

• Manufacturer Part Number: ICS8521BY
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8521BY

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 500MHz
• Output Logic Level: HSTL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Not Compliant

F
8521BY
F
D
The CLK /nCLK accepts LVDS, LVPECL, HSTL, SSTL, HCSL
and other differential signals. Both V
V
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here
F
IGURE
IGURE
PP
IGURE
IFFERENTIAL
3.3V
and V
R5,R6 locate near the driver pin.
3.3V
LVPECL
3C.
3A. CLK/
3E.
1.8V
LVPECL
CMR
R5
100 - 200
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
HSTL D
CLK/
3.3V LVPECL D
CLK/
3.3V LVPECL D
input requirements. Figures 3A to 3E show
C
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
R6
100 - 200
N
N
Zo = 50 Ohm
Zo = 50 Ohm
N
CLK I
CLK I
CLK I
Zo = 50 Ohm
Zo = 50 Ohm
RIVER
I
NPUT
NPUT
NPUT
NPUT
D
R1
50
3.3V
R3
125
D
C1
C2
RIVER
D
RIVER WITH
I
R1
84
RIVEN BY
RIVEN BY
NTERFACE
RIVEN BY
SWING
3.3V
R3
125
R2
50
R4
125
R1
84
R2
84
and V
CLK
nCLK
R4
125
R2
84
CLK
nCLK
3.3V
AC C
OH
3.3V
HiPerClockS
Input
must meet the
HiPerClockS
Input
CLK
nCLK
OUPLE
3.3V
HiPerClockS
Input
www.idt.com
8
F
are examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 3A, the input termination applies for HSTL
drivers. If you are using an HSTL driver from another vendor,
use their termination recommendation.
F
IGURE
IGURE
D
3.3V
3.3V
IFFERENTIAL
3D.
3B.
LVDS_Driv er
LVPECL
CLK/
CLK/
3.3V LVPECL D
3.3V LVDS D
Zo = 50 Ohm
Zo = 50 Ohm
N
N
CLK I
CLK I
Zo = 50 Ohm
Zo = 50 Ohm
-
TO
NPUT
NPUT
-HSTL F
RIVER
R1
50
R3
50
D
D
RIVER
RIVEN BY
RIVEN BY
L
R2
50
OW
R1
100
CLK
nCLK
ANOUT
3.3V
S
ICS8521
HiPerClockS
KEW
Input
REV. E JULY 25, 2010
CLK
nCLK
3.3V
, 1-
B
Receiv er
UFFER
TO
-9