ICS8521BYI IDT, Integrated Device Technology Inc, ICS8521BYI Datasheet - Page 10

• Manufacturer Part Number: ICS8521BYI
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8521BYI

• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Frequency: 500MHz
• Output Logic Level: HSTL
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: LQFP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / RoHS Status: Not Compliant

IDT™ / ICS™ LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-HSTL FANOUT BUFFER
ICS8521I
LOW SKEW, 1-TO-9 DIFFERENTIAL-TO-HSTL FANOUT BUFFER
Table 6. Thermal Resistance θ θ θ θ θ
This section provides information on power dissipation and junction temperature for the ICS8521I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS8521I is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 42.1°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
8521BYI
•
•
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 9 * 32.8mW = 295.2mW
Total Power
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total device power dissipation (example calculation is in section 1 above)
T
85°C + 0.503W * 42.1°C/W = 106.2°C. This is well below the limit of 125°C
JA
A
= Ambient Temperature
= junction-to-ambient thermal resistance
Integrated
Circuit
Systems, Inc.
MAX
_MAX
MAX
= V
= 32.8mW/Loaded Output pair
(3.465V, with all outputs switching) = 208mW + 295.2mW = 503.2mW
DD_MAX
* I
JA
DD_MAX
θ θ θ θ θ
for 32-pin LQFP, Forced Convection
JA
P
DD
= 3.465V * 60mA = 208mW
by Velocity (Linear Feet per Minute)
www.icst.com/products/hiperclocks.html
= 3.3V + 5% = 3.465V, which gives worst case results.
OWER
JA
* Pd_total + T
C
ONSIDERATIONS
A
10
10
67.8°C/W
47.9°C/W
D
0
IFFERENTIAL
TM
devices is 125°C.
55.9°C/W
42.1°C/W
200
-
TO
-HSTL F
JA
must be used . Assuming a
L
OW
50.1°C/W
39.4°C/W
500
ANOUT
S
REV. A NOVEMBER 17, 2005
KEW
, 1-
B
UFFER
TO
ICS8521I
-9
TSD