ICS85310AYI-11 IDT, Integrated Device Technology Inc, ICS85310AYI-11 Datasheet

ICS85310AYI-11

Manufacturer Part Number
ICS85310AYI-11
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Driverr
Datasheet

Specifications of ICS85310AYI-11

Number Of Clock Inputs
2
Mode Of Operation
Differential
Output Frequency
700MHz
Output Logic Level
ECL/LVPECL
Operating Supply Voltage (min)
-2.375/2.375V
Operating Supply Voltage (typ)
-2.5/-3.3/3.3V
Operating Supply Voltage (max)
-3.8/3.8V
Package Type
LQFP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS85310AYI-11LF
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS85310AYI-11LFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
ICS85310AYI-11T
Manufacturer:
IDT
Quantity:
9
Part Number:
ICS85310AYI-11T
Manufacturer:
IDT
Quantity:
20 000
CLK_SEL
General Description
The ICS85310I-11 is a low skew, high performance 1-to-10
Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer. The CLKx,
nCLKx pairs can accept most standard differential input levels. The
ICS85310I-11 is characterized to operate from either a 2.5V or a
3.3V power supply. Guaranteed output and part-to-part skew
characteristics make the ICS85310I-11 ideal for those clock
distribution applications demanding well defined performance and
repeatability.
ICS85310AYI-11 REVISION F JUNE 9, 2010
Block Diagram
CLK_EN
nCLK0
nCLK1
CLK0
CLK1
Pulldown
Pullup
Pulldown
Pullup
Pulldown
Pullup
D
LE
Q
0
1
Low Skew, 1-to-10 Differential-to-3.3V, 2.5V
LVPECL/ECL Fanout Buffer
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Q8
nQ8
Q9
nQ9
1
Features
Ten differential 2.5V, 3.3V LVPECL/ECL output pair
Two selectable differential input pairs
Differential CLKx, nCLKx pairs can accept the following interface
levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
Maximum output frequency: 700MHz
Translates any single ended input signal to 3.3V LVPECL levels
with resistor bias on nCLK input
Output skew: 30ps (typical)
Part-to-part skew: 140ps (typical)
Propagation delay: 2ns (typical)
Additive phase jitter, RMS: <0.13ps (typical)
LVPECL mode operating voltage supply range:
V
ECL mode operating voltage supply range:
V
-40°C to 85°C ambient operating temperature
Available in both standard and lead-free RoHS compliant
packages
CC
CC
= 2.375V to 3.8V, V
= 0V, V
CLK_SEL
Pin Assignment
CLK_EN
nCLK0
nCLK1
CLK1
CLK0
7mm x 7mm x 1.4mm package body
V
V
CC
EE
EE
= -3.8V to -2.375V
5
6
7
8
1
2
3
4
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
32-Lead LQFP
ICS85310I-11
EE
Y Package
Top View
= 0V
©2010 Integrated Device Technology, Inc.
ICS85310I-11
24
23
22
21
20
19
18
17
DATA SHEET
Q5
nQ5
Q3
nQ3
Q4
nQ4
Q6
nQ6

Related parts for ICS85310AYI-11

ICS85310AYI-11 Summary of contents

Page 1

... Pullup nCLK1 Pulldown CLK_SEL Pullup CLK_EN ICS85310AYI-11 REVISION F JUNE 9, 2010 Features • Ten differential 2.5V, 3.3V LVPECL/ECL output pair • Two selectable differential input pairs • Differential CLKx, nCLKx pairs can accept the following interface levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • ...

Page 2

... Input Capacitance IN R Input Pullup Resistor PULLUP R Input Pulldown Resistor PULLDOWN ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER Type Description Power Positive supply pin. Clock select input. When HIGH, selects CLK1, nCLK1 inputs. When LOW, Input Pulldown selects CLK0, nCLK0 inputs ...

Page 3

... Biased; NOTE 1 Biased; NOTE 1 0 Biased; NOTE 1 1 NOTE 1: Please refer to the Applications Information, Wiring the Differential Input to Accept Single-ended Levels. ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER Outputs Q[0:9] nQ[0:9] Disabled; LOW Disabled; HIGH Enabled ...

Page 4

... PP V Common Mode Range; NOTE 1, 2 CMR NOTE 1: V should not be less than -0.3V. IL NOTE 2: Common mode voltage is defined as V ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER Rating 4.6V -0. 50mA 100mA 47.9°C/W (0 lfpm) -65°C to 150° 2.375V to 3.8V ...

Page 5

... NOTE 3: This parameter is defined according with JEDEC Standard 65. NOTE 4: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential cross points. ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER = V = 2.375V to 3.8V; V ...

Page 6

... Often the noise floor of the equipment is higher than the noise floor of the device. This ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER of the power in the 1Hz band to the power in the fundamental. When the required offset is specified, the phase noise is called a dBc value, which simply means dBm at a specified offset from the fundamental ...

Page 7

... Par t 1 nQx Qx Par t 2 nQy Qy tsk(pp) Part-to-Part Skew nCLK[0:1] CLK[0:1] nQ[0:9] Q[0: Propagation Delay ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER SCOPE nCLK[0:1] Qx CLK[0:1] nQx Differential Input Level nQx Qx nQy Qy Output Skew nQ[0:9] Q[0:9] Output Rise/Fall Time ...

Page 8

... This can be done in one of two ways. First, R3 and R4 in parallel should equal the transmission Figure 2. Recommended Schematic for Wiring a Differential Input to Accept Single-ended Levels ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER x 100% line impedance. For most 50Ω ...

Page 9

... R3 and R4 can be 0Ω Figure 3E. CLK/nCLK Input Driven by a 3.3V HCSL Driver ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER Please consult with the vendor of the driver component to confirm the and V must meet the V driver termination requirements ...

Page 10

... Figure 4A. 3.3V LVPECL Output Termination ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER Outputs: LVPECL Outputs All unused LVPECL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated ...

Page 11

... CC 50Ω 50Ω 2.5V LVPECL Driver Figure 5C. 2.5V LVPECL Driver Termination Example ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER level. The R3 in Figure 5B can be eliminated and the termination is shown in Figure 5C. – very close to ground 2.5V 2 ...

Page 12

... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER = 3.8V, which gives worst case results. ...

Page 13

... Pd_L = [(V – (V – 2V))/R OL_MAX CCO_MAX [(2V – 1.7V)/50Ω] * 1.7V = 10.2mW Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER V OUT RL 50Ω ...

Page 14

... Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. Transistor Count The transistor count for ICS85310I-11 is: 1034 ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER θ by Velocity ...

Page 15

... Basic D2 & E2 5.60 Ref. e 0.80 Basic L 0.45 0.60 θ 0° ccc Reference Document: JEDEC Publication 95, MS-026 ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER Maximum 1.60 0.15 1.45 0.45 0.20 0.75 7° 0.10 15 ©2010 Integrated Device Technology, Inc. ...

Page 16

... IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER ...

Page 17

... F 10 Updated Figure 4A & 4B Ordering Information Table - corrected lead-free marking. Converted datasheet format. ICS85310AYI-11 REVISION F JUNE 9, 2010 LOW SKEW, 1-TO-10 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL/ECL FANOUT BUFFER row, revised value from 2.25ns Max 4pF max. to 4pF typical 0.9V; and V max. from 0.85V to 1.0V. ...

Page 18

ICS85310I-11 Data Sheet We’ve Got Your Timing Solution 6024 Silver Creek Valley Road Sales 800-345-7015 (inside USA) San Jose, California 95138 +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to ...

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