ICS853052AGT IDT, Integrated Device Technology Inc, ICS853052AGT Datasheet - Page 9

• Manufacturer Part Number: ICS853052AGT
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Multiplexerr

Specifications of ICS853052AGT

• Number Of Clock Inputs: 2
• Mode Of Operation: Single-Ended
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Operating Supply Voltage (max): 5.5V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: LVCMOS/LVTTL
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Not Compliant

This section provides information on power dissipation and junction temperature for the ICS853052.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853052 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
flow and a multi-layer board, the appropriate value is 112.7°C/W per Table 6B below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
T
T
IDT
ABLE
ABLE
ICS853052
DUAL LVCMOS/LVTTL-TO-DIFFERENTIAL 2.5V, 3.3V, 5V LVPECL MULTIPLEXER
™
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.146W * 112.7°C/W = 101.52°C. This is below the limit of 125°C.
/ ICS
JA
A
6A. T
6B. T
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Power (core)
Power (outputs)
™
Multi-Layer PCB, JEDEC Standard Test Boards
2.5V, 3.3V, 5V LVPECL MULTIPLEXER
HERMAL
HERMAL
MAX
R
R
ESISTANCE
ESISTANCE
= V
MAX
= 30.94mW/Loaded Output pair
CC_MAX
* I
EE_MAX
JA
JA
FOR
FOR
= 5.5V * 21mA = 115.5mW
8-
8-P
CC
JA
JA
PIN
= 5.5V, which gives worst case results.
P
JA
by Velocity (Linear Feet per Minute)
* Pd_total + T
IN
TSSOP, F
by Velocity (Meters per Second)
OWER
SOIC, F
ORCED
ORCED
C
A
ONSIDERATIONS
C
153.3°C/W
112.7°C/W
C
ONVECTION
9
101.7°C/W
ONVECTION
0
0
TM
devices is 125°C.
128.5°C/W
103.3°C/W
90.5°C/W
200
1
ICS853052AG REV. B JANUARY 16, 2008
JA
115.5°C/W
must be used. Assuming no air
97.1°C/W
89.8°C/W
500
2
PRELIMINARY