ICS8536AG-02T IDT, Integrated Device Technology Inc, ICS8536AG-02T Datasheet - Page 13

• Manufacturer Part Number: ICS8536AG-02T
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8536AG-02T

• Number Of Clock Inputs: 3
• Mode Of Operation: Single-Ended
• Output Frequency: 266MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Signal Type: LVCMOS/LVTTL
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

ICS8536-02 Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8536-02.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8536-02 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 87.8°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resitance
ICS8536AG-02 REVISION A JULY 21, 2010
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 6 * 30mW = 180mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
70°C + 0.488W * 87.8°C/W = 112.8°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
(3.3V, with all outputs switching) = 308.385mW + 180mW = 488.385mW
MAX
MAX
= V
= 30mW/Loaded Output pair
CC_MAX
θ
JA
for 24 Lead TSSOP, Forced Convection
* I
EE_MAX
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 89mA = 308.385mW
* Pd_total + T
θ
JA
A
87.8°C/W
vs. Air Flow
13
0
1-TO-6, DUALCRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
83.5°C/W
JA
1
must be used. Assuming no air flow and
©2010 Integrated Device Technology, Inc.
81.3°C/W
2.5