ICS8536AG-02T IDT, Integrated Device Technology Inc, ICS8536AG-02T Datasheet - Page 2

• Manufacturer Part Number: ICS8536AG-02T
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Driverr

Specifications of ICS8536AG-02T

• Number Of Clock Inputs: 3
• Mode Of Operation: Single-Ended
• Output Frequency: 266MHz
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Signal Type: LVCMOS/LVTTL
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Compliant

ICS8536-02 Data Sheet
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
ICS8536AG-02 REVISION A JULY 21, 2010
Symbol
C
R
R
IN
PULLUP
PULLDOWN
3, 19, 22
Number
17, 18
20, 21
23, 24
1, 2
4, 5
7, 8
10,
14,
16
11
12
13
15
9,
6
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
XTAL_OUT0
XTAL_OUT1
CLK_SEL0,
CLK_SEL1
XTAL_IN0,
XTAL_IN1,
CLK_EN
nQ2, Q2
nQ1, Q1
nQ0, Q0
nQ5, Q5
nQ4, Q4
nQ3, Q3
Name
CLK0
V
V
CC
EE
Output
Output
Output
Output
Output
Output
Power
Power
Input
Input
Input
Input
Input
Type
Pulldown
Pulldown
Pullup
Test Conditions
Differential output pair. LVPECL interface levels.
Power supply pins.
Differential output pair. LVPECL interface levels.
Negative supply pin.
Differential output pair. LVPECL interface levels.
Parallel resonant crystal interface.
XTAL_OUT0 is the output, XTAL_IN0 is the input.
Synchronizing clock enable. When HIGH, clock outputs follow clock input. When
LOW, the outputs are disabled. LVCMOS / LVTTL interface levels. See Table 3A.
Parallel resonant crystal interface.
XTAL_OUT1 is the output, XTAL_IN1 is the input.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Description
Clock select pins. LVCMOS/LVTTL interface levels. See Table 3B.
Single-ended clock input. LVCMOS/LVTTL interface levels.
2
1-TO-6, DUALCRYSTAL/LVCMOS-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
Minimum
Typical
©2010 Integrated Device Technology, Inc.
51
51
4
Maximum
Units
k
k
pF
Ω
Ω