PCF8573TD NXP Semiconductors, PCF8573TD Datasheet - Page 5

PCF8573TD

Manufacturer Part Number
PCF8573TD
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF8573TD

Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
16
Mounting
Surface Mount
Time Format
HH:MM:SS
Lead Free Status / RoHS Status
Not Compliant
Philips Semiconductors
7
7.1
The PCF8573 has an integrated crystal-controlled
oscillator which provides the timebase for the prescaler.
The frequency is determined by a single 32.768 kHz
crystal connected between OSCI and OSCO. A trimmer is
connected between OSCI and V
7.2
The prescaler provides a 128 Hz signal at the FSET output
for fine adjustment of the crystal oscillator without loading
it. The prescaler also generates a pulse once a second to
2003 Jan 27
handbook, halfpage
Clock/calendar with serial I/O
FUNCTIONAL DESCRIPTION
Oscillator
Prescaler and time counter
Fig.3 Pinning diagram (SO16).
EXTPF
COMP
V SS2
PFIN
SDA
SCL
A0
A1
1
2
3
4
5
6
7
8
PCF8573T
MBL806
DD
.
16
15
14
13
12
11
10
9
V DD
V SS1
OSCO
OSCI
TEST
FSET
SEC
MIN
5
advance the seconds counter. The carry of the prescaler
and the seconds counter are available at the outputs SEC,
MIN respectively, and are also readable via the I
The mark-to-space ratio of both signals is 1 : 1. The time
counter is advanced one count by the falling edge of output
signal MIN. A transition from HIGH-to-LOW of output
signal SEC triggers MIN to change state.
The time counter counts minutes, hours, days and months,
and provides a full calendar function which needs to be
corrected only once every four years - to allow for
leap-year. Cycle lengths are shown in Table 1.
7.3
The alarm register is a 24-bit memory. It stores the
time-point for the next setting of the status flag COMP.
Details of writing and reading of the alarm register are
included in the description of the characteristics of the
I
7.4
The comparator compares the contents of the alarm
register and the time counter, each with a length of 24 bits.
When these contents are equal the flag COMP will be set
4 ms after the falling edge of MIN. This set condition
occurs once at the beginning of each minute. This
information is latched, but can be cleared by an instruction
via the I
immediately after the flag is set and will be executed. Flag
COMP information is also available at the output COMP.
The comparison may be based upon hours and minutes
only if the internal flag NODA (no date) is set. Flag NODA
can be set and cleared by separate instructions via the
I
instruction has been received. Both COMP and NODA
flags are readable via the I
2
2
C-bus.
C-bus, but it is undefined until the first set or clear
Alarm register
Comparator
2
C-bus. A clear instruction may be transmitted
2
C-bus.
Product specification
PCF8573
2
C-bus.

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