MCZ33742EG Freescale, MCZ33742EG Datasheet

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... This document contains certain information on a new product. Specifications and information herein are subject to change without notice. © Freescale Semiconductor, Inc., 2007-2008. All rights reserved. DW SUFFIX EG SUFFIX (PB-FREE) 98ASB42345B 28-PIN SOICW Device MC33742DW/R2 MCZ33742EG/R2 MC33742SDW/R2 MCZ33742SEG/R2 MC33742EP/R2 V PWR 33742 V2 VDD VSUP ...

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... The duration the pin is asserted low when the Reset mode is entered after RST the SBC is powered up under-voltage condition is detected, and the DD watchdog register is not properly triggered. See Page page 20 page 20 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... VSUP HS L1 Programmable Wake-up Input CANH CANL Figure 2. 33742 Simplified Internal Block Diagram Analog Integrated Circuit Device Data Freescale Semiconductor INTERNAL BLOCK DIAGRAM V2CTRL VSUP Monitor Dual Voltage Regulator 5.0V/200mA V1 Monitor Mode Control HS Control Oscillator Interrupt Watchdog Reset SPI High-speed 1.0Mbps ...

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... The CS input pin is used with the SPI bus to select the 33742. When the CS is asserted LOW, the 33742 is the selected device of the SPI bus. The WDOG output pin is asserted LOW if the software watchdog is not correctly triggered. section beginning on page 23. Definition Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... LOW) 17-20 GND Ground 41-44 Analog Integrated Circuit Device Data Freescale Semiconductor Figure 4. 33742 48-Pin Connections Functional Pin description Definition No connection. Clock input pin for the Serial Peripheral Interface (SPI). SPI data sent to the MCU by the 33742. When CS is HIGH, the pin is in the high- impedance state ...

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... Supply input pin for the 33742. Output of the internal high side switch. The output current is internally limited to 150mA. Inputs from external switches or from logic circuitry. CAN high output pin. CAN low output pin. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Testing done in accordance with the Human Body Model (C 2. Testing done in accordance with ISO 7637-1. See 3. Load dump testing done in accordance with ISO 7637-1, Transient test done in accordance with ISO 7637-1. See Analog Integrated Circuit Device Data Freescale Semiconductor ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Symbol V SUP ...

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... Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics. ...

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... Oscillator running means one of the following function is active: Forced Wake-up or Cyclic Sense or Software Watchdog in Stop mode. 13. Oscillator not running means none of the following functions are active: Forced Wake-up and Cyclic Sense and Software Watchdog in Stop mode. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A ...

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... V — 1.0 — 5.3 5.8 6.3 V 0.1 0.2 0.3 V 4.9 5.0 5.1 4.0 — — V — 0.2 0.5 V — 0.1 0.25 mA 200 285 350 °C 160 — 200 °C 125 — 160 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... In Reset, Normal Request, Normal and Standby modes, measures with capacitance = 47μF tantalum.Selectable by RSTTH bit in SPI Register Reset Control Register (RCR). 19. Guaranteed by characterization and design not production tested. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A ...

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... A Symbol (20 V2CTRL V 2LTH ≤ 125°C. Typical values noted A Min Typ Max Unit V DD 0.99 1.0 1.01 mA 200 — — mA 0.0 — 10 3.75 4.0 4. 0.0 — 1 0.9 — μA - 2.0 — 2.0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... High-level Output Voltage I = -250μA O Notes 23. Output pin only. Supply from VDD. Structure switch to ground with pullup current source. 24. Push-pull structure. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A Symbol ...

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... V 2.7 3.3 3.8 3.0 4.0 4.6 3.5 4.2 4.7 V 0.6 — 1.3 μA -10 — 10 — 1.3 3.0 mA — 1.5 3.5 mA μA — μA — — 1.0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... CANH CANL 7.0V CANH CANL Notes 26. Reported in CAN register. For a description of the contents of the CAN register, refer to Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A Symbol CANH ...

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... V — 2.0 — V SUP — 2.0 — V SUP — 0.43 — — 0.43 — μA — 100 — 0.7 V — 0 0.4 — 0 μA -10 — 10 μA -150 - 100 - 1.0 — — — — 0.5 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Not production tested. Guaranteed by design. 31. Not production tested. Guaranteed by design. Detected by V2 OFF. 32 indirectly measured (1.0ms reset) and trimmed. OSC Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A Symbol (29) f ...

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... Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Normal Request mode Notes 33. Delay starts at falling edge of clock cycle #8 of the SPI command and start of “Turn ON” or “Turn OFF” V2. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A ...

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... Typical values noted A Min Typ Max Unit μs — — 10 μs — — 10 μ μs 90 — N/A μs 20 — N/A μs 25 — — μs 4.0 — 30 μ 3.0 3.5 4.0 μs 8 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... See Figure 8, page 22. 37. See Figure 9, page 22. 38. See Figure 10, page 22. Analog Integrated Circuit Device Data Freescale Semiconductor ≤ 18V, and -40°C ≤ T SUP = 25°C under nominal conditions, unless otherwise noted. A Symbol t DOUT t (36) LRD t (37) TRD ...

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... V 0 LDR V DIFF 2.0 V Figure 9. Propagation Delay TXD to CAN 0 DIFF RXD Figure 10. Propagation Delay CAN to RXD t LAG DI 8 Don’t Care t SODIS TRD 2 TDR 0 DIFF CANH CANL t RDR 0 RRD 2.0 V 0.8 V Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... INT is enabled using the Interrupt Register (INTR). When an interrupt occurs, INT stays LOW until the interrupt source is cleared. Analog Integrated Circuit Device Data Freescale Semiconductor FUNCTIONAL DESCRIPTION INTRODUCTION • Sleep and Stop modes low power operating modes to reduce an application’s current consumption while providing a wake-up capability from the CAN interface wake-up inputs, or from a timer wake-up ...

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... CS is the Chip Select pin of the serial peripheral interface. When this pin is LOW, the SPI port of the device is selected. WATCHDOG OUTPUT (WDOG) The Watchdog output pin is asserted LOW to flag that the software watchdog has not been properly triggered. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... RXD pins, from/to the MCU, and the CANL & CANH pins of the CAN physical interface. The various modes of the CAN interface are controlled through the SPI control registers. Analog Integrated Circuit Device Data Freescale Semiconductor Integrated Supply Analog Circuitry MCU Interface Reset & ...

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... When the watchdog timer is not properly serviced by the MCU, an error signal (WDOGN low) and a reset signal (RSTN low) are output. CAN INTERFACE/CONTROL The operation of the CAN interface is controlled by the MCU through the use of SPI control register bits. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Table 7, page 29, offers a summary of the functional modes. Analog Integrated Circuit Device Data Freescale Semiconductor voltage is 5.0V and tracks the VDD regulator. The MJD32C transistor is recommended for use as the external pass device. Other PNP transistors can be used but depending on the device’s gain, an external resistor-capacitor network might be needed ...

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... Normal Request mode to Reset mode to Normal Request mode. If the Normal Request mode is entered after a wake-up from Sleep mode, and no watchdog configuration occurs while the 33742S is in Normal Request mode, the SBC returns to the Sleep mode. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... MCU. In this case the MCU selects the device the using a LOW-to-HIGH transition on the 33742 CS pin. Then the 33742S goes into Normal Request mode and generates an interrupt pulse at the INT pin. Analog Integrated Circuit Device Data Freescale Semiconductor Wake-up Capabilities RST Pin (if Enabled) – ...

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... WDOG pin is set LOW until the TIM1 register is properly accessed. data in the CS-STOP table on page 17.) Once 33742 in Stop mode. I over I DD DD-DGLT falls below the reset DD ), the RST pin is pulled LOW until RSTTH ). RSTDUR fall or watchdog DD Analog Integrated Circuit Device Data Freescale Semiconductor DD ...

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... The wake-up options are selectable through SPI while the 33742 is in Normal or Standby mode and prior to entering low power modes (Sleep or Stop mode). When a wake-up occurs in Sleep mode, the Analog Integrated Circuit Device Data Freescale Semiconductor WDOG Output LOW to HIGH HIGH ...

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... After device or system power-up, or after the SBC awakens from Sleep mode, the 33742S enters into the Reset mode prior to moving into Normal Request mode. Figure 13, shows the device state diagram. shows device operation after power-up. Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC 47 for Figure 14, ...

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... Figure 13. SBC State Diagram (Not Valid in Debug Modes) Power-Up Reset Normal Request Yes No Trigger Batfail Yes Normal Analog Integrated Circuit Device Data Freescale Semiconductor Watchdog: Timeout OR V Low DD Watchdog: Timeout & Nostop &!BATFAIL SPI: Standby and 2 Watchdog Trigger Normal Request 3 1 Low OR Watchdog: ...

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... To avoid entering debug mode after a power-up, first read the BATFAIL bit (MCR read) and write 0000 into the MCR register. Figures 16 and 17, page 35, show the detailed operation of the SBC once the debug mode has been selected. 33742 not in Debug mode. Watchdog ON Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... If Stop mode is entered entered without watchdog, no matter the WDSTOP bit. (E) Debug mode entry point (Step 5 of the Debug mode entering sequence). (R) Represents transitions to Reset mode due to V1 low. Figure 17. Simplified 33742S State Diagram in Debug Modes Analog Integrated Circuit Device Data Freescale Semiconductor Watchdog: Timeout 350ms Reset Counter Reset (3.4ms) Expired ...

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... Normal Request mode). During the time reset is LOW, the RST pin sinks 5.0mA maximum (I ). PDW VDD RST MCU with Flash Memory WDOG 5.0 V Programming Tool RST , and WDOG test points on application circuit board. Analog Integrated Circuit Device Data RSTDUR Programming Bus Freescale Semiconductor ...

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... CAN SPI Register. In the TXRX mode, which is used for communication, four different slew rates are available for the user. In the Sleep mode, the user has the option of enabling or disabling the remote CAN wake-up capability. Analog Integrated Circuit Device Data Freescale Semiconductor V2 33742 V2 Driver ...

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... The delay time from TXD pin to CAN bus, from CAN bus to RXD, and from the TXD to RXD loop time is affected by the slew rate selection < 500mV CANH CANL CAN Recessive State Table 9 and page 50). Four slew rates are Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... The state of the RXD pin is dependant upon: 1) the V2 voltage, 2) the external circuitry connected to RXD, (i.e. the MCU RXD pin), and 3) any external pull-up between RXD and the 5V supply. Analog Integrated Circuit Device Data Freescale Semiconductor V2 Voltage TXD Pin RXD Pin 0.0V ...

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... The three pulses must occur within a time frame of 1.0ms. The pattern wake-up of the 33742 CAN interface allow wake-up by any CAN message content. Figure 22 below illustrates the CAN signals during a CAN bus Sleep state and wake-up sequence. Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... CANL CANL Dominant RXD CAN in TXRX Mode Figure 22. CAN Bus Signal During Can Sleep State and Wake-up Sequence Analog Integrated Circuit Device Data Freescale Semiconductor CANH Dominant Pulse # 1 CANL Dominant Ground CAN Bus Sleep State CAN in Sleep Mode (Wake-up Enable) ...

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... Latch Internal Wake-up Signal RST Standby Figure 24, several single-ended Table 11 indicates the state of the Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Lb (Threshold V SUP No failure 0 CANL to VSUP 1 CANH to VSUP 1 L5 (Threshold VDD- 0.43V) H5 (Threshold VDD- 0.43V) L5 (Threshold VDD- 0.43V) No failure 0 CANL CANH Analog Integrated Circuit Device Data Freescale Semiconductor VDD RVB CANH CANL RVB V R5 Figure 24. CAN Bus Simplified Structure Hg (Threshold 1.75V) Lg (Threshold 1 ...

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... To prevent this, an RXD failure detection, as illustrated in CANL CANH Diff Output V 2 RXD Output CANH 60 Ω RXD Flag CANL Prop Delay Figure 25 and explained below, is necessary. Sampling Sampling Sampling Sampling RXD Short to V1 RXD Flag Latched Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Note RXD Flag is neither the RXPR bit in the LPC register nor the CANF bit in INTR register. Figure 26. RXD Recovery Conditions Analog Integrated Circuit Device Data Freescale Semiconductor TXD PERMANENT DOMINANT FAILURE PRINCIPLE In the event TXD is set to a permanent low level, the CAN bus is set into dominant level, and no communication is possible ...

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... Communication OK No change No communication No change No communication Analog Integrated Circuit Device Data . HS OFF No change OFF Turn OFF if VDD under- voltage reset occurs OFF OFF No change OFF HS over-temperature may occur No change No change No change (51) No change No change No change No change (51) No change (51) No change Freescale Semiconductor ...

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... LPC $110 Low Power Control Register (LPC) on page 54 INTR $111 Interrupt Register (INTR) on page 56 Analog Integrated Circuit Device Data Freescale Semiconductor LOGIC COMMANDS AND REGISTERS Table 13. Possible Reset Conditions Condition 33742 Reset 33742 Mode Transition Bit 1 Bit 0 33742 Mode MOSI ...

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... Temperature pre-warning on VDD regulator (bit latched). No failure. CAN Failure or HS over-temperature or V2 low. No watchdog reset occurred. Watchdog reset occurred MCTR1 MCTR0 GFAIL WDRST 0 0 POR, RESET POR, RESET Debug Mode: Hardware and – – – – – Description Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Table 21. CANCLR Control Bits Logic No effect. 0 Re-enables CAN driver after TXD permanent dominant or RXD permanent recessive failure occurred. Failure 1 recovery conditions must occur to re-enable. Analog Integrated Circuit Device Data Freescale Semiconductor D3 D2 WDSTOP NOSTOP 1 0 POR, NR2N, NR2STB No Watchdog in Stop mode. ...

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... HS control provides status bit information – HSON V2LOW HSOT – 0 – POR (Table 22). SC0 bit (D1) defines the slew CAN Mode (Pass 1.1) Description D1 D0 – – VSUPLOW DEBUG – – – – Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Notes 61. See Table 13, page 47, for definitions of reset conditions. Wake-up inputs can be configured by pair. L0 and L1 can be configured together, and L1 and L2, and L2 and L3 can be configured together (Table 28). Analog Integrated Circuit Device Data Freescale Semiconductor HS State (60) V > 4.0V. 0 2LTH V < 4.0V. 1 2LTH No HS over-temperature. ...

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... CANL2BAT – 0 – POR, RESET Config – – Inputs Disabled High Level Sensitive Low Level Sensitive Both Level Sensitive Description 30). Watchdog timing characteristics are D1 D0 WDT1 WDT0 CANL2GND TXPD 0 0 POR, RESET POR, RESET Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... R Reset Value – – (64) Reset Condition (Write) Notes 64. See Table 13, page 47, for definitions of reset conditions. Analog Integrated Circuit Device Data Freescale Semiconductor Timing (ms typ) Parameter 9.75 Watchdog Period 1 45 Watchdog Period 2 100 Watchdog Period 3 350 Watchdog Period 4 9.75 Watchdog Period 1 ...

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... LPC register setup required for proper cyclic sense or direct wake LX2HS FWU CANH2VDD CANH2BAT 0 0 POR, NR2R, N2R, STB2R, STO2R STB2R, STO2R D1 D0 CAN-INT HSAUTO CANH2GND RXPR 0 0 POR, NR2R, N2R, POR, NR2R, N2R, STB2R, STO2R STB2R, STO2R Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Table 39. LPC Status Bits Name CANH2VDD CANH2BAT CANH2GND RXPR Analog Integrated Circuit Device Data Freescale Semiconductor Wake-up Inputs Supplied by HS Auto-timing HS in Sleep and Stop modes Description 49). After reading the CAN register or setting CAN-INT to logic [1], it will be cleared Logic No CANH short to V ...

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... INT pulse is generated; however, INTR register content remains at 0000 DDS-WU2 Logic No V < 5.8V. 0 BF(EW) V < 5.8V. 1 BF(EW over-temperature over-temperature VDD medium temperature (pre-warning). 0 VDD medium temperature (pre-warning CAN failure. 0 CAN failure V1TEMP CANF V1TEMP CANF 0 0 POR, RST POR, RST < 4.0V. Description Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Rd C9 Connector Legend D1: Example: 1N4002 type Q1: MJD32C R1, R2, R3, R4: 10kΩ Rp, Rd: Example: 1.0kΩ depending on switch type. R5: 2.2kΩ C1: 10μF Analog Integrated Circuit Device Data Freescale Semiconductor TYPICAL APPLICATIONS 33742 D1 VSUP Monitor V SUP Dual Voltage Regulator VDD Monitor C1 C2 ...

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... RST pin is HIGH. If watchdog is not refreshed, the 33742 generates a reset and returns to Normal Request mode. Figure 33, page 59, illustrates the operation. Components List C1: 22μF C2: 100nF V DD C3: >10μF RESET C4: 100nF MCU Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... SBC in SBC in Normal Request & Reset modes Reset mode Reset each 350ms Analog Integrated Circuit Device Data Freescale Semiconductor Watchdog Refresh SBC in Normal mode pin stays HIGH, but the high level (Voh) follows V1 level. The Watchdog Refresh SBC in Normal SBC in Normal ...

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... Sleep mode CANH CANH (33742) R5 CANL CANL (33742) CAN Connector Legend R6, R7: 30Ω CL, CH: 220pF CS: > 470pF Figure 37. CAN Bus Split Termination Under-voltage at VDD 100ms Reset mode SBC in Sleep mode CANH (33742 CANL (33742 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... SOIC package, eight of the 28 pins are internally connected to the package lead frame for heat transfer to the printed circuit board. Important For the most current revision of the package, visit www.freescale.com and perform a keyword search on the 98A drawing number below. Analog Integrated Circuit Device Data ...

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... PACKAGING PACKAGING DIMENSIONS 33742 62 DW SUFFIX EG SUFFIX (PB-FREE) 28-LEAD SOICW 98ASB42345B ISSUE G Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Analog Integrated Circuit Device Data Freescale Semiconductor EP SUFFIX (PB-FREE) 48-LEAD QFN 98ASA10825D ISSUE 0 PACKAGING PACKAGING DIMENSIONS 33742 63 ...

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... PACKAGING PACKAGING DIMENSIONS 33742 64 EP SUFFIX (PB-FREE) 48-LEAD QFN 98ASA10825D ISSUE 0 Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Analog Integrated Circuit Device Data Freescale Semiconductor EP SUFFIX (PB-FREE) 48-LEAD QFN 98ASA10825D ISSUE 0 PACKAGING PACKAGING DIMENSIONS 33742 65 ...

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... Figure 38. Surface Mount for SOIC Wide Body 33742DW 33742EG 28-PIN SOICW DW SUFFIX EG SUFFIX (PB-FREE) 98ASB42345B 28-PIN SOICW Note For package dimensions, refer to the 33742 data sheet. 1.0 0.2 1.0 0.2 * All measurements are in millimeters 28 Pin SOICW 1.27 mm Pitch non-Exposed Pad Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Area A: Cu heat-spreading areas on board surface Ambient Conditions: Natural convection, still air Analog Integrated Circuit Device Data Freescale Semiconductor A Figure 39. Thermal Test Board Table 44. Thermal Resistance Performance A [mm² the thermal resistance between die junction and θ ...

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... W Step response, Device on Thermal Test Board Area A = 600 (mm 33742 θJA 0 300 Heat spreading area A [mm²] Figure 40. Device on Thermal Test Board θJA 1.00E-01 1.00E+00 1.00E+01 1.00E+02 1.00E+03 1.00E+04 Time[s] Figure 41. Transient Thermal Resistance R 600 θ JA θ Analog Integrated Circuit Device Data Freescale Semiconductor ...

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... Implemented Revision History page • Added Thermal Addendum (Rev. 1.0) 6/2006 4 • Changed Data Sheet from “Advanced” to “Final” • Added MCZ33742EG/R2 and MCZ33742SEG/R2 to the Ordering Information block 8/2006 5 • Replaced label for Logic Inputs to 8/2006 6 WDOG, and INT) on page 7 • ...

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... Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer ...