82P2284BB IDT, Integrated Device Technology Inc, 82P2284BB Datasheet - Page 296
82P2284BB
Manufacturer Part Number
82P2284BB
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82P2284BB.pdf
(363 pages)
Specifications of 82P2284BB
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
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Part Number:
82P2284BBG
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E1 PRGD Status/Error Control (072H, 172H, 272H, 372H)
BERE:
INV:
SYNCV:
SYNCE:
E1 PRGD Interrupt Indication (073H, 173H, 273H, 373H)
BERI:
SYNCI:
Programming Information
IDT82P2284
Bit Name
Bit Name
= 0: Disable the interrupt on the INT pin when the BERI bit (b3, E1-073H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the BERI bit (b3, E1-073H,...) is ‘1’.
= 0: No bit error is inserted to the generated pattern.
= 1: A single bit error is inserted to the generated pattern.
This bit is cleared after the single bit error insertion is completed.
= 0: The pattern is out of synchronization (the pattern detector has detected 10 or more bit errors in a fixed 48-bit window).
= 1: The pattern is in synchronization (the pattern detector has detected at least 48 consecutive error-free bit periods).
= 0: Disable the interrupt on the INT pin when the SYNCI bit (b0, E1-073H,...) is ‘1’.
= 1: Enable the interrupt on the INT pin when the SYNCI bit (b0, E1-073H,...) is ‘1’.
= 0: No bit is mismatched with the PRGD pattern when the extracted data is in synchronization state.
= 1: At least one bit is mismatched with the PRGD pattern when the extracted data is in synchronization state.
This bit will be cleared if a ’1’ is written to it.
= 0: There is no status change on the SYNCV bit (b1, E1-072H,...).
= 1: There is a transition (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the SYNCV bit (b1, E1-072H,...).
This bit will be cleared if a ’1’ is written to it.
Default
Default
Bit No.
Bit No.
Type
Type
7
7
6
6
Reserved
Reserved
5
5
4
4
296
QUAD T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
BERE
BERI
R/W
R
3
0
3
0
R/W
INV
2
0
2
Reserved
SYNCV
R
1
0
1
February 25, 2008
SYNCE
SYNCI
R/W
R
0
0
0
0
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