DJLXT384LE.B1SE001 Intel, DJLXT384LE.B1SE001 Datasheet - Page 124

DJLXT384LE.B1SE001

Manufacturer Part Number
DJLXT384LE.B1SE001
Description
Manufacturer
Intel
Datasheet

Specifications of DJLXT384LE.B1SE001

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
Intel
13.0
124
Table 74. ITU G.703 2.048 Mbit/s Pulse Mask Specifications
Figure 31. E1, ITU G.703 Mask Template
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Note:
Mask Specifications
This chapter discusses the specifications for the mask into which the LXT384 Transceiver
transmitter output pulses must fit. The mask specification has two parts.
For information on pulse shaping, see
Test load impedance
Nominal peak voltage for a mark
Nominal peak voltage for a space
Nominal pulse width
Ratio (in terms of percentage) of the positive mark amplitude to the
negative mark amplitude, with both marks referenced to a space
Part 1
Part 2
V = 100%
50%
(Table
(Figure
0%
10%
10%
20%
Note: V corresponds to the nominal peak value.
20%
74) lists specifications on how the pulse relates to load resistance.
31) shows the border limits (the mask template) into which the pulse must fit.
10%
10%
Parameter
(244 – 25)
(244 + 244)
(244 + 25)
(244 – 50)
20%
194 ns
219 ns
269 ns
244 ns
488 ns
Section 6.4.2, “Transmitter Pulse
10%
10%
Nominal pulse
Pair Cable
0 ± 0.300
95 to 105
Twisted-
3.00
120
244
Shaping”.
Revision Date: November 28, 2005
Document Number: 248994
0 ± 0.237
95 to 105
Coaxial
Revision Number: 005
Cable
2.37
244
75
Ratio
Unit
in %
ns
Ω
V
V

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