DJLXT384LE.B1SE001 Intel, DJLXT384LE.B1SE001 Datasheet - Page 67

• Manufacturer Part Number: DJLXT384LE.B1SE001
• Manufacturer: Intel

Specifications of DJLXT384LE.B1SE001

• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Not Compliant

6.9
Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Note: A benefit of performance-monitoring is that the monitored signal can be sent to channel 0, where it
Performance Monitoring
The LXT384 Transceiver can be set for either one of the following configurations:
The LXT384 Transceiver can be configured to monitor the performance of either (1) one of the
line-side receivers 1 through 7 or (2) one of the line-side transmitters 1 through 7. The
configuration can be performed using either the Hardware mode (see
“Signal Loss and Line-Code-Violation
Chapter 8.0,
Performance Monitoring through Clock and Data Recovery. Performance monitoring of either
(1) analog inputs to channels 1 through 7 or (2) analog outputs from any one of channels 1 through
7 can be accomplished through clock and data recovery as follows.
Performance Monitoring through Remote Loopback. Performance monitoring of either
(1) analog line inputs RTIP/RRING to any one of channels 1 through 7 or (2) analog line outputs
TTIP/TRING from any one of channels 1 through 7 can be accomplished through remote loopback
as follows:
can be used as a timing reference clock.
1. As shown in
2. The line signal from the channel selected can then be observed digitally at RCLK0/RPOS0/
1. Configure the LXT384 Transceiver as shown in
2. The monitored channel and channel 0 output the same data. By connecting the channel 0
•
•
All eight channels 0 through 7 operating as regular transceivers
Channels 1 through 7 operating as regular transceivers and the channel 0 transceiver
configured for non-intrusive performance monitoring of one of the other channels, per ITU-T
G.722
selected for monitoring is processed by the channel 0 transceiver clock and data recovery.
RNEG0. Channel 0 displays the appropriate LOS state for the line signal of the channel
selected, both in transmit and receive directions.
Loopback”. (TCLK must be active for remote loopback to operate.)
output data (TTIP0/TRING0) to standard test equipment, the line signal from the channel
selected can be monitored.
“Registers”).
Figure 1
in
Chapter 2.0, “Product
Intel
Signals”) or the Host Processor mode (see
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Summary”, the analog input from the channel
Figure 10
in
Section 6.7.3, “Remote
Table 14
in
Section 5.7,
Table 39
in
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