WJLXT385LE.B1 Cortina Systems Inc, WJLXT385LE.B1 Datasheet - Page 70

• Manufacturer Part Number: WJLXT385LE.B1
• Manufacturer: Cortina Systems Inc

Specifications of WJLXT385LE.B1

• Lead Free Status / RoHS Status: Supplier Unconfirmed

6.8
6.8.1
70
Intel
Figure 11. TAOS Generation for Intel
®
LXT385 Octal E1 S/H PCM Transceiver with JA
Note:
Note:
Transmit All Ones Operations
For Transmit All Ones (TAOS) operations, the LXT385 ransceiver has the following TAOS modes:
The TAOS mode is inhibited during Remote loopback.
TAOS Generation
When the LXT385 ransceiver is set for a:
Figure 11
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•
•
•
•
•
•
Section 6.8.1, “TAOS Generation”
Section 6.8.2, “TAOS Generation with Analog Loopback”
Section 6.8.3, “TAOS Generation with Digital Loopback”
Hardware mode, the TAOS mode is set by connecting the TCLK pin high for more than 16
MCLK cycles.
Host Processor mode, the TAOS mode is set by asserting the corresponding bit in the TAOS
register. In case of LOS, Automatic TAOS Select (ATS) insertion can be set with the ATS
register
The TAOS generator uses the clock signal on the MCLK pin as a timing reference. As a result,
when the LXT385 ransceiver is set for data-recovery mode with a Motorola processor, TAOS
does not work because wait states cannot be added. To ensure the output frequency is within
specification limits, MCLK must have the applicable stability.
When TAOS is active, DLOOP does not function.
TNEG
TPOS
RNEG
TCLK
RPOS
MCLK
RCLK
shows how the LXT385 ransceiver generates the Transmit All Ones mode.
(Table
* If Enabled
TAOS mode
39).
®
JA*
LXT385 Transceiver
Recovery
Control
Timing
Timing
and
TTIP
TRING
(ALL 1's)
RTIP
RRING
Revision Date: 19-Jan-2006
Document Number: 249252
Revision Number: 006