LAN91C96-MU Standard Microsystems (SMSC), LAN91C96-MU Datasheet - Page 39
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LAN91C96-MU
Manufacturer Part Number
LAN91C96-MU
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.LAN91C96-MU.pdf
(125 pages)
Specifications of LAN91C96-MU
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Compliant
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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
SMSC LAN91C96 5v&3v
relevant. The transmit byte count least significant bit will be assumed 0 by the controller regardless of the
value written in memory. The maximum size of the frame can be stored in 6 pages (256 bytes per page),
the maximum BYTE COUNT number is 1536.
DATA AREA (in RAM)
The data area starts at offset 4 of the packet structure, and it can extend for up to 1531 bytes. The data
area contains six bytes of DESTINATION ADDRESS followed by six bytes of SOURCE ADDRESS,
followed by a variable length number of bytes.
On transmit, all bytes are provided by the CPU, including the source address. The LAN91C96 does not
insert its own source address. On receive, all bytes are provided by the CSMA side.
The 802.3 Frame Length word (Frame Type in Ethernet) is not interpreted by the LAN91C96. It is treated
transparently as data for both transmit and receive operations.
CONTROL BYTE (in RAM)
The CONTROL BYTE always resides on the high byte of the last word.
CONTROL BYTE is written by the CPU as:
ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE.
If clear, the number of data bytes is even and the byte before the CONTROL BYTE is not transmitted.
CRC - When set, CRC will be appended to the frame. This bit has only meaning if the NOCRC bit in the
TCR is set.
For receive packets the CONTROL BYTE is written by the controller as:
ODD - If set, indicates an odd number of bytes, with the last byte being right before the CONTROL BYTE.
If clear, the number of data bytes is even and the byte before the CONTROL BYTE should be ignored.
RECEIVE FRAME STATUS WORD (in RAM)
This word is written at the beginning of each receive frame in memory. It is not available as a register.
ALGNERR - Frame had alignment error.
BRODCAST - Receive frame was broadcast.
BADCRC - Frame had CRC error.
ALGN
ERR
0
X
BROD
CAST
5
X
1
BADCRC
ODD
ODD
4
DATASHEET
ODDFRM
HASH VALUE
3
0
CRC
Page 39
TOOLNG
0
2
0
0
SHORT
0
TOO
1
0
0
0
For transmit packets the
0
0
MULT
CAST
Revision 1.0 (10-24-08)