LAN9420I-NU Standard Microsystems (SMSC), LAN9420I-NU Datasheet - Page 88

• Manufacturer Part Number: LAN9420I-NU
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9420I-NU

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Revision 1.4 (12-17-08)
4.2.2
31:16
BITS
11:7
6:4
15
14
13
12
3
2
1
0
RESERVED
Software Interrupt Enable (SW_INT_EN)
On a transition from low to high, this register bit triggers the software
interrupt.
RESERVED
Master Bus Error Interrupt Enable (MBERR_INT_EN)
When set high, the Master Bus Error is enabled to generate an interrupt.
Slave Bus Error Interrupt Enable (SBERR_INT_EN)
When set high, the Slave Bus Error is enabled to generate an interrupt.
RESERVED
GPIO [2:0] (GPIOx_INT_EN)
When set high the GPIOx are enabled as interrupt sources.
GP Timer Interrupt Enable (GPT_INT_EN)
When set high the General Purpose Timer is enabled as an interrupt
source.
PHY Interrupt Enable (PHY_INT_EN)
When set high, the PHY interrupt is enabled as an interrupt source.
Wake Event Interrupt Enable (WAKE_INT_EN)
When set high, wake event detection is enabled as an interrupt source.
RESERVED
Interrupt Control Register (INT_CTL)
Interrupts are enabled/disabled through this register. Refer to
page 28
Note: The DMAC interrupt (DMAC_INT) is enabled through the DCSR.
Offset:
for more information on the Interrupt Controller.
DESCRIPTION
00C4h
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
DATASHEET
88
Size:
Section 3.3.1, "Interrupt Controller," on
32 bits
TYPE
SMSC LAN9420/LAN9420i
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
DEFAULT
000b
Datasheet
0b
0b
0b
0b
0b
0b
-
-
-
-