AT84CS001VTP E2V, AT84CS001VTP Datasheet - Page 9

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AT84CS001VTP

Manufacturer Part Number
AT84CS001VTP
Description
Manufacturer
E2V
Datasheet

Specifications of AT84CS001VTP

Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 110C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT84CS001VTP
Manufacturer:
E2V
Quantity:
20 000
3.5
Figure 3-7.
Figure 3-8.
e2v semiconductors SAS 2009
Output Mode (STAGG)
(in DR/2 mode)
(in DR/2 mode)
in DR/2 mode
in DR/2 mode
DRB (BORN)
DRA (AORN)
DRB (BORN)
(in DR mode)
DRA (AORN)
(in DR mode)
Simultaneous Mode in 1:4 Ratio (STAGG = 1)
Staggered Mode in 1:2 Ratio (STAGG = 0)
in DR mode
in DR mode
Data Out
Data Out
Data Out
Data Out
Data Out
Data Out
Two output modes are provided:
In staggered mode, the output clock for each port is provided by the DRA, DRAN, DRB, DRBN, DRC,
DRCN and DRD, DRDN signals, which correspond to AORN, AOR, BRON, BOR, CORN, COR, DORN
and DOR respectively.
The Simultaneous mode is the default mode (STAGG left floating or at logic 1). The Staggered mode is
activated through the STAGG input (active low level).
• Staggered: the data packets are output one after the other
• Simultaneous: all the data packets are output at the same time
Port A
Port B
Port A
Port C
Port B
Port D
DR
DR
DR
DR
N - 1
N + 1
N + 2
N + 3
N
N
N + 1
N + 4
N + 5
N + 6
N + 2
N + 7
N + 3
0809E–BDC–05/09
AT84CS001
9

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