ADM6992CXABT1XP Lantiq, ADM6992CXABT1XP Datasheet - Page 31

• Manufacturer Part Number: ADM6992CXABT1XP
• Manufacturer: Lantiq

Specifications of ADM6992CXABT1XP

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Package Type: LQFP
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 14
Register Short Name
FR_9
FR_10
FR_11
FR_12
FR_13
FR_14
FR_15
PB_ID_0_0
PB_ID_1_0
PB_ID_0_1
PB_ID_1_1
TPR_0_0
TPR_1_0
TPR_0_1
TPR_1_1
TPR_0_2
TPR_1_2
TPR_0_3
TPR_1x
OAM_C_1
OAM_CR_2
MCR_3
MCR_4
MCR_5
FC_1
FC_2
DV_CR
The register is addressed wordwise.
Table 15
Mode
read/write
read
Read only
Read virtual
Data Sheet
Registers Overview (cont’d)
Register Access Types
Symbol Description HW
rw
r
ro
rv
Register Long Name
Filter Register 9
Filter Register 10
Filter Register 11
Filter Register 12
Filter Register 13
Filter Register 14
Filter Register 15
Port Base VLAN ID and Mask 0 of Port 0
Port Base VLAN ID and Mask 1 of Port 0
Port Base VLAN ID and Mask 0 of Port 1
Port Base VLAN ID and Mask 1 of Port 1
Tag Port Rule 0 Register 0
Tag Port Rule 1 Register 0
Tag Port Rule 0 Register 1
Tag Port Rule 1 Register 1
Tag Port Rule 0 Register 2
Tag Port Rule 1 Register 2
Tag Port Rule 0 Register 3
Tag Port Rule 1 x
OAM Configuration Register 1
OAM Configuration Register 2
Miscellaneous Configuration Register 3
Miscellaneous Configuration 4
Miscellaneous Configuration Register 5
Forwarding Configuration 1
Forwarding Configuration 2
Default Value Control Register
Register is used as input for the HW
Register is written by HW (register
between input and output -> one cycle
delay)
Register is set by HW (register between
input and output -> one cycle delay)
Physically, there is no new register, the
input of the signal is connected directly
to the address multiplexer.
31
Description SW
Register is readable and writable by SW
Value written by software is ignored by
hardware; that is, software may write any
value to this field without affecting hardware
behavior (= Target for development.)
SW can only read this register
SW can only read this register
Offset Address
22
23
24
25
26
27
28
29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
37
38
39
3A
3B
3C
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Registers Description
Rev. 1.02, 2005-11-25
ADM6992C/CX
Page Number
45
45
45
45
45
45
45
46
46
47
47
48
48
48
49
48
49
48
49
49
51
51
52
52
53
53
54
Ninja C/CX