PLRXPL-VC-S43-22-N JDS UNIPHASE, PLRXPL-VC-S43-22-N Datasheet - Page 21

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PLRXPL-VC-S43-22-N

Manufacturer Part Number
PLRXPL-VC-S43-22-N
Description
Manufacturer
JDS UNIPHASE
Datasheet

Specifications of PLRXPL-VC-S43-22-N

Number Of Receivers
1
Protocols Supported
IEEE 802.3
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Operating Supply Voltage (max)
3.47V
Operating Supply Voltage (min)
3.14V
Pin Count
20
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Supply Current
110mA
Lead Free Status / RoHS Status
Compliant
21
4.2 Package and Handling Instructions
This product is not compatible with any aqueous wash process.
Process plug
The PLRXPL-VC-S43-xx-N optical transceiver is supplied with a process plug.
This plug protects the transceiver optics during standard manufacturing processes
by preventing contamination from air borne particles.
Note: It is recommended that the dust cover remain in the transceiver whenever an
optical fi ber connector is not inserted.
Recommended cleaning and degreasing chemicals
JDSU recommends the use of methyl, isopropyl and isobutyl alcohols for cleaning.
Do not use halogenated hydrocarbons (trichloroethane, ketones such as acetone,
chloroform, ethyl acetate, MEK, methylene chloride, methylene dichloride, phenol,
N-methylpyrolldone).
Flammability
The housing is made of cast zinc and sheet metal.
4.3 Electrostatic Discharge (ESD)
Handling
Normal ESD precautions are required during the handling of this module. This
transceiver is shipped in ESD protective packaging. It should be removed from the
packaging and handled only in an ESD protected environment utilizing standard
grounded benches, floor mats, and wrist straps.
Test and operation
In most applications, the optical connector will protrude through the system chas-
sis and be subjected to the same ESD environment as the system. Once properly
installed in the system, this transceiver should meet and exceed common ESD
testing practices and fulfi ll system ESD requirements.
Typical of optical transceivers, this module’s receiver contains a highly sensitive
optical detector and amplifi er which may become temporarily saturated during
an ESD strike. This could result in a short burst of bit errors. Such an event would
call for the application to reacquire synchronization at the higher layers (serializer/
deserializer chip).
10 G SFP+ 850 NM LIMITING TRANSCEIVER,
10 GIGABIT ETHERNET COMPATIBLE

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