TJA1028T/5V0/20 NXP Semiconductors, TJA1028T/5V0/20 Datasheet - Page 8

• Manufacturer Part Number: TJA1028T/5V0/20
• Manufacturer: NXP Semiconductors

Specifications of TJA1028T/5V0/20

• Number Of Transmitters: 1
• Power Supply Requirement: Single
• Package Type: SO
• Mounting: Surface Mount
• Pin Count: 8
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
TJA1028
Product data sheet
7.5.1 General fail-safe features
7.5.2 TXD dominant time-out function
7.4 Remote wake-up
7.5 Fail-safe features
A remote wake-up is triggered by a falling edge on pin LIN, followed by LIN remaining
LOW for at least t
The remote wake-up request is communicated to the microcontroller in Standby mode by
a continuous LOW level on pin RXD.
Note that t
TXD is HIGH.
The following general fail-safe features have been implemented:
A TXD dominant time-out timer circuit prevents the bus line being driven to a permanent
dominant state (blocking all network communications) if TXD is forced permanently LOW
by a hardware or software application failure. The timer is triggered by a negative edge on
the TXD pin. If the pin remains LOW for longer than the TXD dominant time-out time
(t
is reset by a positive edge on TXD.
Fig 5.
to(dom)TXD
•
•
•
•
•
An internal pull-up towards V
is left floating by a bad solder joint or floating microcontroller port pin.
The current in the transmitter output stage is limited in order to protect the transmitter
against short circuits to pin V
A loss of power (pins V
microcontroller. There will be no reverse currents from the bus.
The LIN transmitter is automatically disabled when either EN or RSTN is LOW.
After a transition to Normal mode, the LIN transmitter is only enabled if a recessive
level is present on pin TXD.
Remote wake-up behavior
wake(busdom)min
RXD
V
), the transmitter is disabled, driving the bus line to a recessive state. The timer
LIN
All information provided in this document is subject to legal disclaimers.
LIN dominant
Standby/Sleep mode
wake(busdom)min
0.4V
Sleep: floating/Standby: HIGH
BAT
Rev. 2 — 25 February 2011
is measured in Sleep and Standby modes, and in Normal mode if
BAT
LIN recessive
and GND) has no impact on the bus line or on the
t
, followed by a rising edge on pin LIN (see
wake(busdom)min
CC
BAT
on pin TXD guarantees a recessive bus level if the pin
.
LIN transceiver with integrated voltage regulator
LOW
Standby mode
TJA1028
© NXP B.V. 2011. All rights reserved.
015aaa088
V
0.6V
ground
BAT
Figure
BAT
5).
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