ICS1892YT IDT, Integrated Device Technology Inc, ICS1892YT Datasheet - Page 31
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ICS1892YT
Manufacturer Part Number
ICS1892YT
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.ICS1892YT.pdf
(148 pages)
Specifications of ICS1892YT
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6.7.2 Clock Source: Crystal
ICS1892, Rev. D, 2/26/01
Figure 6-1
source. As shown, connect the two leads of the crystal between the ICS1892 pins REF_IN and REF_OUT.
To properly load the crystal, also add two capacitors (C1 and C2 of
REF_IN and ground (digital domain) and one connected between REF_OUT and ground (digital domain).
Note:
As revealed by an impedance analysis of the recommended crystal configuration circuit, capacitors C1 and
C2 are in series. In addition, the circuit has stray capacitance, which
This stray capacitance is the collective result of board layout and pad capacitance.
Stray capacitance CS3 is in parallel with C1, depicted cumulatively as CL1. Stray capacitance CS4 is in
parallel with C2, depicted cumulatively as CL2. Therefore, the total capacitive load as viewed by the crystal
is the series sum of the two capacitors CL1 and CL2. (To add capacitors in series, add their inverse.)
If the capacitors C1 and C2 have the same value (which is recommended), then CL1 = CL2. In this case,
each capacitance CL1 and CL2 equals twice the rated load capacitance of the crystal. For example, if
CS3 = CS4 = 5 pF, and the rated capacitive load of the crystal is 25 pF, then C1 = C2 = 45 pF.
(CL1 = CL2 = 50 pF. Therefore, CL1 in parallel with CL2 equals 25 pF.)
Crystal accuracy is affected by load capacitance. The following factors also affect the crystal accuracy and
must be considered when selecting a crystal for a design:
•
•
•
•
Figure 6-1. Recommended Configuration for a Crystal Clock Source
The crystal cut. The crystal must be cut for accuracy. In some cases, this cut can require using a fixture
that has equivalent capacitive loading characteristics as the final application.
The crystal temperature characteristics
The crystal aging characteristics
CL1 and CL2, that is, the specific capacitive loading that occurs as a result of the particular printed circuit
board that is used and the board layout
CS3
ICS1892
Because a crystal is a tuned RLC circuit, crystal loading has a significant impact on the clock
source accuracy.
shows the recommended configuration when a crystal is used to supply the ICS1892 clock
CL1
C1
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
31
C2
CL2
CS4
Figure
Figure 6-1
6-1): one connected between
Chapter 6 Interface Overviews
REF_IN
REF_OUT
shows as CS3 and CS4.
February 26, 2001
ICS1892
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