1892YLF IDT, Integrated Device Technology Inc, 1892YLF Datasheet - Page 126

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1892YLF

Manufacturer Part Number
1892YLF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of 1892YLF

Lead Free Status / RoHS Status
Compliant
10.5.3 Timing for Receive Clock (RXCLK) Pin
ICS1892, Rev. D, 2/26/01
Table 10-10
interfaces.
Table 10-10. MII Receive Clock Timing
Figure 10-3. Receive Clock Timing Diagram
RXCLK
Period
Time
t2a
t2b
t2c
t2d
t1
ICS1892 Data Sheet
RXCLK Duty Cycle
RXCLK Period
RXCLK Period
RXCLK Period
RXCLK Period
Figure 10-3
lists the significant time periods for signals on the Receive Clock (RXCLK) pin for the various
Parameter
t1
shows the timing diagram for the time periods.
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
t2
100M MII (100Base-TX)
10M MII (10Base-T)
100M Symbol Interface (100Base-TX)
10M Symbol Interface (10Base-T)
Conditions
126
Chapter 10 DC and AC Operating Conditions
Min.
35
Typ.
400
100
50
40
40
February 26, 2001
Max.
65
Units
ns
ns
ns
ns
%

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