IDT82V1671AJ IDT, Integrated Device Technology Inc, IDT82V1671AJ Datasheet - Page 28

• Manufacturer Part Number: IDT82V1671AJ
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V1671AJ

• Number Of Channels: 4
• On-hook Transmission: Yes
• Polarity Reversal: Yes
• On-chip Ring Relay Driver: Yes
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: PLCC
• Operating Temperature Classification: Industrial
• Pin Count: 28
• Mounting: Surface Mount
• Operating Current: 95mA
• Operating Supply Voltage (max): 3.465V
• Operating Supply Voltage (min): 3.135V
• Lead Free Status / RoHS Status: Compliant

Table - 5 Registers and Coe-RAM Locations Used for Off-hook Detection
Off-hook Indication
Mask bit for HK[3:0] bits
Off-hook Threshold Selection
Off-hook Threshold for Active Mode
Hysteresis for Off-hook Detection
Debounce Interval Selection
RSLIC & CODEC CHIPSET
Ground-key
Off-hook/
MCLK
Parameter
FS
Debounce Interval
(0.125 ms − 2 ms)
DB[3:0]
Bits HK[3:0] in GREG26
Bit HK_M in LREG18
Bit Signaling in LREG5
Word HKthld in the Coe-RAM
Word HKHyst in the Coe-RAM
Bits DB[3:0] in LREG11
Register Bits/Coe-RAM Words
Figure - 14 Debounce Filter for Off-hook/Ground-key Detection
D
En
4 bit Debounce
Counter
Q
HK[n] = 0: Channel n+1 is on-hook (n = 0 to 3);
HK[n] = 1: Channel n+1 is off-hook.
HK_M = 0: each change of HK[3:0] bits generates an interrupt;
HK_M = 1: changes of HK[3:0] bits do not generate interrupts.
Signaling = 0: the off-hook threshold in the Coe-RAM is selected.
Signaling = 1: the off-hook threshold in the ROM is selected (default).
If the Signaling bit in LREG5 is set to 0, the off-hook threshold for active mode is
programmed by word HKthld in the Coe-RAM. It is programmable from 0 to 20 mA with
±
If the Signaling bit in LREG5 is set to 1, the default value of 7 mA (stored in the ROM) is
selected.
If the Signaling bit in LREG5 is set to 0, the hysteresis for off-hook detection is
programmed by word HKhyst in the Coe-RAM. It is programmable from 0 to 20 mA with
±
If the Signaling bit in LREG5 is set to 1, the default value of 2 mA (stored in the ROM) is
selected.
The interval is programmable from 0.125 ms to 2 ms in steps of 0.125 ms. The default
value of DB[3:0] is ‘0000’, corresponding to the minimum debounce interval of 0.125 ms.
5% tolerance.
5% tolerance.
Up/down Counter
Up/down
En
28
16 states
Q
DB[0]
DB[1]
DB[2]
DB[3]
IDT82V1671/IDT82V1671A, IDT82V1074
Notes
0
1
MUX
Debounced
Ground-key
Off-hook/