XC95144XL-10TQG144I Xilinx Inc, XC95144XL-10TQG144I Datasheet - Page 3

• Manufacturer Part Number: XC95144XL-10TQG144I
• Description: CPLD XC9500XL Family 3.2K Gates 144 Macro Cells 100MHz 0.35um (CMOS) Technology 3.3V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: XC9500XLr

Specifications of XC95144XL-10TQG144I

• Package: 144TQFP
• Family Name: XC9500XL
• Device System Gates: 3200
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 117
• Number Of Logic Blocks/elements: 8
• Typical Operating Supply Voltage: 3.3 V
• Maximum Operating Frequency: 100 MHz
• Number Of Product Terms Per Macro: 90
• Memory Type: Flash
• Operating Temperature: -40 to 85 °C
• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 8
• Number Of Macrocells: 144
• Number Of Gates: 3200
• Number Of I /o: 117
• Mounting Type: Surface Mount
• Package / Case: 144-TQFP, 144-VQFP
• Voltage: 3.3V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Number Of Logic Elements/cells: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1375

DS056 (v2.0) April 3, 2007
Product Specification
JTAG Port
I/O/GCK
I/O/GSR
I/O/GTS
R
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Function Block outputs (indicated by the bold line) drive the I/O Blocks directly.
4
3
1
1
3
Figure 2: XC95144XL Architecture
Controller
Blocks
JTAG
I/O
www.xilinx.com
In-System Programming Controller
18
18
18
18
18
XC95144XL High Performance CPLD
54
54
54
54
54
Macrocells
Macrocells
Macrocells
Macrocells
Macrocells
Function
Function
Function
Function
Function
Block 1
Block 2
Block 3
Block 4
Block 8
1 to 18
1 to 18
1 to 18
1 to 18
1 to 18
DS056_02_101300
3