XC5VLX50-1FFG324C Xilinx Inc, XC5VLX50-1FFG324C Datasheet - Page 288
![FPGA, VIRTEX-5 LX, 50K, 324FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50-1FFG324C
Manufacturer Part Number
XC5VLX50-1FFG324C
Description
FPGA, VIRTEX-5 LX, 50K, 324FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50-1FFG324C
No. Of Logic Blocks
7200
Family Type
Virtex-5
No. Of Speed Grades
1
Total Ram Bits
1769472
No. Of I/o's
220
Clock Management
DCM, PLL
I/o Supply Voltage
3.3V
Operating Frequency Max
550MHz
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Number Of I /o
220
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-BBGA, FCBGA
Core Supply Voltage Range
1V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF324-500-G - BOARD DEV VIRTEX 5 FF324HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
122-1562
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50-1FFG324C
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XILINX
Quantity:
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XC5VLX50-1FFG324C
Manufacturer:
XilinxInc
Quantity:
3 000
Company:
Part Number:
XC5VLX50-1FFG324C
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Quantity:
10 000
Company:
Part Number:
XC5VLX50-1FFG324CES
Manufacturer:
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Quantity:
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- XC5VLX30-1FFG324C PDF datasheet
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- Download datasheet (14Mb)
Chapter 6: SelectIO Resources
X-Ref Target - Figure 6-80
288
External Termination
DCI
SSTL18_II_DCI
SSTL18 Class II (1.8V)
R 0 = 20
SSTL18_II
Ω
2R
2R
Figure 6-80: SSTL18 (1.8V) Class II Unidirectional Termination
IOB
VRN
VRP
Figure 6-80
for SSTL Class II (1.8V).
Figure 6-81
for SSTL (1.8V) Class II.
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
R S = 20Ω
V
CCO
shows a sample circuit illustrating a valid unidirectional termination technique
shows a sample circuit illustrating a valid bidirectional termination technique
V
TT
= 1.8V
= 0.9V
IOB
R P = Z 0 = 50Ω
www.xilinx.com
Z 0
Z 0
R P = Z 0 = 50Ω
V
TT
IOB
V
= 0.9V
CCO
2R
2R
= 1.8V
VRP
VRN
IOB
V
= 2Z 0 = 100Ω
= 2Z 0 = 100Ω
REF
V
REF
= 0.9V
= 0.9V
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
SSTL18_II_DCI
SSTL18_II
+
–
ug190_6_75_030506
+
–
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