PIC12LF1840-E/SN Microchip Technology, PIC12LF1840-E/SN Datasheet - Page 344

• Manufacturer Part Number: PIC12LF1840-E/SN
• Description: 7 KB Flash, 256 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core, Nano
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 12Fr

Specifications of PIC12LF1840-E/SN

• Processor Series: PIC12F
• Core: PIC
• Program Memory Type: Flash
• Program Memory Size: 7 KB
• Data Ram Size: 256 B
• Interface Type: MI2C, SPI, EUSART
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC12(L)F1840
TABLE 30-9:
FIGURE 30-12:
DS41441B-page 344
Standard Operating Conditions (unless otherwise stated)
Operating temperature
AD130* T
AD131
AD132* T
Note 1: The ADRES register may be read on the following T
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
*
†
A/D Data
A/D CLK
BSF ADCON0, GO
ADRES
Sample
T
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Sym.
AD
CNV
ACQ
ADIF
GO
AD134
SLEEP instruction to be executed.
Q4
A/D Clock Period
A/D Internal RC Oscillator
Period
Conversion Time (not including
Acquisition Time)
Acquisition Time
PIC12(L)F1840 A/D CONVERSION REQUIREMENTS
AD132
PIC12(L)F1840 A/D CONVERSION TIMING (NORMAL MODE)
-40°C  T
Characteristic
(1)
A
 +125°C
(T
OSC
/2
(1)
)
7
OLD_DATA
Min.
1.0
1.0
—
—
6
Preliminary
AD131
CY
Sampling Stopped
Typ†
5
1.6
5.0
11
—
cycle.
CY
is added before the A/D clock starts. This allows the
4
AD130
Max.
9.0
6.0
—
—
3
Units
T
s
s
s
AD
2
T
ADCS<1:0> = 11 (ADRC mode)
Set GO/DONE bit to conversion
complete
OSC
-based
1
 2011 Microchip Technology Inc.
0
Conditions
NEW_DATA
DONE
1 T
CY
1 T
CY