PIC16F1934-I/MV Microchip Technology, PIC16F1934-I/MV Datasheet - Page 241
![7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE](/photos/16/12/161286/qfn44_sml.jpg)
PIC16F1934-I/MV
Manufacturer Part Number
PIC16F1934-I/MV
Description
7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
Specifications of PIC16F1934-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1934-I/MV
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1936-ISS PDF datasheet #4
- PIC16F1936-ISS PDF datasheet #5
- PIC16F1936-ISS PDF datasheet #6
- PIC16F1936-ISS PDF datasheet #7
- PIC16F1936-ISS PDF datasheet #8
- Current page: 241 of 508
- Download datasheet (5Mb)
FIGURE 23-4:
23.2.1
The MSSP module has five registers for SPI mode
operation. These are:
• MSSP STATUS register (SSPSTAT)
• MSSP Control Register 1 (SSPCON1)
• MSSP Control Register 3 (SSPCON3)
• MSSP Data Buffer register (SSPBUF)
• MSSP Address register (SSPADD)
• MSSP Shift register (SSPSR)
SSPCON1 and SSPSTAT are the control and STATUS
registers in SPI mode operation. The SSPCON1 regis-
ter is readable and writable. The lower 6 bits of the
SSPSTAT are read-only. The upper two bits of the
SSPSTAT are read/write.
In one SPI master mode, SSPADD can be loaded with
a value used in the Baud Rate Generator. More infor-
mation on the Baud Rate Generator is available in
Section 23.7 “Baud Rate Generator”.
SSPSR is the shift register used for shifting data in and
out. SSPBUF provides indirect access to the SSPSR
register. SSPBUF is the buffer register to which data
bytes are written, and from which data bytes are read.
In receive operations, SSPSR and SSPBUF together
create a buffered receiver. When SSPSR receives a
complete byte, it is transferred to SSPBUF and the
SSPIF interrupt is set.
During transmission, the SSPBUF is not buffered. A
write to SSPBUF will write to both SSPBUF and
SSPSR.
2009 Microchip Technology Inc.
(Not directly accessible)
SPI MODE REGISTERS
SPI Master
SPI MASTER AND MULTIPLE SLAVE CONNECTION
General I/O
General I/O
General I/O
SDO
SCK
SDI
Preliminary
PIC16F193X/LF193X
SCK
SDI
SDO
SS
SCK
SDI
SDO
SS
SCK
SDI
SDO
SS
SPI Slave
SPI Slave
SPI Slave
#1
#2
#3
DS41364D-page 241
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