PIC16F1934-I/MV Microchip Technology, PIC16F1934-I/MV Datasheet - Page 313
![7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE](/photos/16/12/161286/qfn44_sml.jpg)
PIC16F1934-I/MV
Manufacturer Part Number
PIC16F1934-I/MV
Description
7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
Specifications of PIC16F1934-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Ram Size
256 B
Interface Type
MI2C, SPI, EUSART
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F1934-I/MV
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1936-ISS PDF datasheet #4
- PIC16F1936-ISS PDF datasheet #5
- PIC16F1936-ISS PDF datasheet #6
- PIC16F1936-ISS PDF datasheet #7
- PIC16F1936-ISS PDF datasheet #8
- Current page: 313 of 508
- Download datasheet (5Mb)
FIGURE 24-12:
TABLE 24-8:
2009 Microchip Technology Inc.
BAUDCON
INTCON
PIE1
PIR1
RCREG
RCSTA
SPBRGL
SPBRGH
TRISC
TXSTA
Legend: x = unknown, - = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Master
(SCKP = 0)
(SCKP = 1)
(Interrupt)
Note:
TX/CK pin
TX/CK pin
CREN bit
SREN bit
bit SREN
RCIF bit
Name
RXREG
RX/DT
Write to
Read
pin
*
Reception.
Page provides register information.
Timing diagram demonstrates Sync Master mode with bit SREN = 1 and bit BRGH = 0.
‘0’
EUSART Receive Data Register
TMR1GIE
TMR1GIF
ABDOVF
TRISC7
CSRC
SPEN
Bit 7
SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER
RECEPTION
GIE
SYNCHRONOUS RECEPTION (MASTER MODE, SREN)
TRISC6
bit 0
RCIDL
ADIE
PEIE
ADIF
Bit 6
RX9
TX9
bit 1
TMR0IE
TRISC5
SREN
TXEN
RCIE
RCIF
Bit 5
—
bit 2
TRISC4
Preliminary
CREN
SCKP
SYNC
INTE
Bit 4
TXIE
TXIF
BRG<15:8>
BRG<7:0>
bit 3
TRISC3
ADDEN
SENDB
BRG16
SSPIE
SSPIF
IOCIE
Bit 3
PIC16F193X/LF193X
bit 4
TMR0IF
CCP1IE
CCP1IF
TRISC2
BRGH
FERR
Bit 2
—
bit 5
TMR2IE
TMR2IF
TRISC1
OERR
TRMT
WUE
Bit 1
INTF
bit 6
TMR1IE
TMR1IF
TRISC0
ABDEN
bit 7
IOCIF
RX9D
TX9D
Bit 0
DS41364D-page 313
Register
on Page
294*
301*
301*
300
100
103
299
140
298
99
‘0’
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