PIC16F1947-E/MR Microchip Technology, PIC16F1947-E/MR Datasheet - Page 135
![28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 64 QFN 9x9x0.9mm TUBE](/photos/16/3/160368/qfn64_sml.jpg)
PIC16F1947-E/MR
Manufacturer Part Number
PIC16F1947-E/MR
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(46 pages)
3.PIC16LF1946-IPT.pdf
(448 pages)
4.PIC16LF1946-IPT.pdf
(6 pages)
5.PIC16F1946-IPT.pdf
(8 pages)
Specifications of PIC16F1947-E/MR
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1946-IPT PDF datasheet #3
- PIC16LF1946-IPT PDF datasheet #4
- PIC16F1946-IPT PDF datasheet #5
- Current page: 135 of 448
- Download datasheet (4Mb)
TABLE 12-4:
2010 Microchip Technology Inc.
APFCON
LATC
LCDSE1
LCDSE2
LCDSE3
LCDSE4
LCDSE5
PORTC
RC1STA
RC2STA
SSP1CON1
SSP2STAT
T1CON
TX1STA
TX2STA
TRISC
Legend:
Name
x = unknown, u = unchanged, - = unimplemented locations read as ‘0’. Shaded cells are not used by PORTC.
P3CSEL
TRISC7
LATC7
WCOL
CSRC
CSRC
SPEN
SPEN
SE15
SE23
SE31
SE39
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC
Bit 7
SMP
RC7
—
TMR1CS<1:0>
P3BSEL
TRISC6
SSPOV
LATC6
SE14
SE22
SE30
SE38
Bit 6
RC6
CKE
RX9
RX9
TX9
TX9
—
P2DSEL
TRISC5
SSPEN
LATC5
SREN
SREN
TXEN
TXEN
SE13
SE21
SE29
SE37
SE45
Bit 5
RC5
D/A
T1CKPS<1:0>
Preliminary
P2CSEL
TRISC4
LATC4
CREN
CREN
SYNC
SYNC
SE12
SE20
SE28
SE36
SE44
Bit 4
RC4
CKP
P
T1OSCEN
P2BSEL
ADDEN
ADDEN
TRISC3
LATC3
SE11
SE19
SE27
SE35
SE43
Bit 3
RC3
—
—
S
PIC16F/LF1946/47
CCP2SEL
T1SYNC
TRISC2
LATC2
BRGH
BRGH
FERR
FERR
SE10
SE18
SE26
SE34
SE42
Bit 2
RC2
R/W
SSPM<3:0>
P1CSEL
TRISC1
LATC1
OERR
OERR
TRMT
TRMT
SE17
SE25
SE33
SE41
Bit 1
RC1
SE9
UA
—
TMR1ON
P1BSEL
TRISC0
LATC0
RX9D
RX9D
TX9D
TX9D
SE16
SE24
SE32
SE40
Bit 0
RC0
SE8
DS41414B-page 135
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Register
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