PIC16F526-I/ST Microchip Technology, PIC16F526-I/ST Datasheet - Page 21

• Manufacturer Part Number: PIC16F526-I/ST
• Description: 1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, 8b ADC, 2x Compar
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F526-I/ST

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 11
• Program Memory Size: 1.5KB (1K x 12)
• Program Memory Type: FLASH
• Ram Size: 67 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 3x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ICE2000 - EMULATOR MPLAB-ICE 2000 POD
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.6
As a program instruction is executed, the Program
Counter (PC) will contain the address of the next
program instruction to be executed. The PC value is
increased by one every instruction cycle, unless an
instruction changes the PC.
For a GOTO instruction, bits 8:0 of the PC are provided
by the GOTO instruction word. The Program Counter
(PCL) is mapped to PC<7:0>. Bit 5 of the STATUS
register provides page information to bit 9 of the PC
(Figure 4-3).
For a CALL instruction, or any instruction where the
PCL is the destination, bits 7:0 of the PC again are
provided by the instruction word. However, PC<8>
does not come from the instruction word, but is always
cleared (Figure 4-3).
Instructions where the PCL is the destination, or modify
PCL instructions, include MOVWF PCL, ADDWF PCL
and BSF PCL,5.
FIGURE 4-3:
 2010 Microchip Technology Inc.
CALL or Modify PCL Instruction
GOTO Instruction
Note:
PC
PC
Program Counter
Because bit 8 of the PC is cleared in the
CALL instruction or any modify PCL
instruction, all subroutine calls or com-
puted jumps are limited to the first 256
locations of any program memory page
(512 words long).
7
7
10
10
9
Status
9
Status
PA0
Reset to ‘0’
PA0
8 7
8 7
LOADING OF PC
BRANCH INSTRUCTIONS
Instruction Word
Instruction Word
PCL
PCL
0
0
0
0
4.6.1
The PC is set upon a Reset, which means that the PC
addresses the last location in the last page (i.e., the
oscillator calibration instruction). After executing
MOVLW XX, the PC will roll over to location 00h and
begin executing user code.
The STATUS register page preselect bits are cleared
upon a Reset, which means that page 0 is pre-selected.
Therefore, upon a Reset, a
automatically cause the program to jump to page 0 until
the value of the page bits is altered.
4.7
The PIC16F526 device has a 2-deep, 12-bit wide
hardware PUSH/POP stack.
A CALL instruction will PUSH the current value of Stack 1
into Stack 2 and then PUSH the current PC value, incre-
mented by one, into Stack Level 1. If more than two
sequential CALLs are executed, only the most recent two
return addresses are stored.
A RETLW instruction will POP the contents of Stack
Level 1 into the PC and then copy Stack Level 2
contents into Stack Level 1. If more than two sequential
RETLWs are executed, the stack will be filled with the
address previously stored in Stack Level 2. Note that
the W register will be loaded with the literal value
specified in the instruction. This is particularly useful for
the implementation of data look-up tables within the
program memory.
Note 1: There are no Status bits to indicate Stack
2: There are no instruction mnemonics
Stack
EFFECTS OF RESET
Overflows or Stack Underflow conditions.
called PUSH or POP. These are actions
that occur from the execution of the CALL
and RETLW instructions.
PIC16F526
GOTO instruction will
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