PIC16F722-E/MV Microchip Technology, PIC16F722-E/MV Datasheet - Page 20

3.5 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc 28 UQFN 4x4x0.5mm TUBE

PIC16F722-E/MV

Manufacturer Part Number
PIC16F722-E/MV
Description
3.5 KB Flash, 1.8V-5.5V, 16 MHz Int. Osc 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F722-E/MV

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F72X/PIC16LF72X
FIGURE 2-3:
DS41341E-page 20
Program
Memory
On-chip
CALL, RETURN
RETFIE, RETLW
Interrupt Vector
Stack Level 1
Stack Level 2
Stack Level 8
Reset Vector
PROGRAM MEMORY MAP
AND STACK FOR THE
PIC16F726/LF726 AND
PIC16F727/LF727
PC<12:0>
Page 0
Page 1
Page 2
Page 3
13
0000h
0004h
0005h
07FFh
0800h
0FFFh
1000h
1FFFh
17FFh
1800h
2.2
The data memory is partitioned into multiple banks
which contain the General Purpose Registers (GPRs)
and the Special Function Registers (SFRs). Bits RP0
and RP1 are bank select bits.
RP1
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function
Registers are the General Purpose Registers,
implemented as static RAM. All implemented banks
contain Special Function Registers. Some frequently
used Special Function Registers from one bank are
mirrored in another bank for code reduction and
quicker access.
2.2.1
The register file is organized as 128 x 8 bits in the
PIC16F722/LF722, 192 x 8 bits in the PIC16F723/LF723
and PIC16F724/LF724, and 368 x 8 bits in the
PIC16F726/LF726
register is accessed either directly or indirectly through
the File Select Register (FSR), (Refer to Section 2.5
“Indirect Addressing, INDF and FSR Registers”).
2.2.2
The Special Function Registers are registers used by
the CPU and peripheral functions for controlling the
desired operation of the device (refer to Table 2-1).
These registers are static RAM.
The Special Function Registers can be classified into
two sets: core and peripheral. The Special Function
Registers associated with the “core” are described in
this section. Those related to the operation of the
peripheral features are described in the section of that
peripheral feature.
0
0
1
1
RP0
Data Memory Organization
0
1
0
1
GENERAL PURPOSE REGISTER
FILE
SPECIAL FUNCTION REGISTERS
Bank 0 is selected
Bank 1 is selected
Bank 2 is selected
Bank 3 is selected
and
© 2009 Microchip Technology Inc.
PIC16F727/LF727.
Each

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