PIC18F26K80-I/MM Microchip Technology, PIC18F26K80-I/MM Datasheet - Page 258
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE](/photos/16/12/161267/qfn-28_sml.jpg)
PIC18F26K80-I/MM
Manufacturer Part Number
PIC18F26K80-I/MM
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F26K80-I/MM
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad
Processor Series
PIC18F26K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3648 B
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F66K80 FAMILY
18.10 Operation During Sleep/Idle Modes
18.10.1
When the device enters any Sleep mode, the CTMU
module current source is always disabled. If the CTMU
is performing an operation that depends on the current
source when Sleep mode is invoked, the operation may
not
measurements may return erroneous values.
18.10.2
The behavior of the CTMU in Idle mode is determined
by the CTMUSIDL bit (CTMUCONH<5>). If CTMUSIDL
is cleared, the module will continue to operate in Idle
mode. If CTMUSIDL is set, the module’s current source
is disabled when the device enters Idle mode. In this
TABLE 18-1:
DS39977C-page 258
CTMUCONH CTMUEN
CTMUCONL EDG2POL EDG2SEL1 EDG2SEL0 EDG1POL EDG1SEL1 EDG1SEL0 EDG2STAT EDG1STAT
CTMUICON
PIR3
PIE3
IPR3
PADCFG1
Legend: — = unimplemented, read as ‘ 0 ’. Shaded cells are not used during ECCP operation.
Name
terminate
SLEEP MODE
IDLE MODE
ITRIM5
RDPU
correctly.
Bit 7
REGISTERS ASSOCIATED WITH CTMU MODULE
—
—
—
Capacitance
ITRIM4
REPU
Bit 6
—
—
—
—
CTMUSIDL
ITRIM3
RC2IE
RC2IP
RC2IF
RFPU
Bit 5
and
time
Preliminary
ITRIM2
RGPU
TGEN
TX2IF
TX2IE
TX2IP
Bit 4
case, if the module is performing an operation when
Idle mode is invoked, the results will be similar to those
with Sleep mode.
18.11 Effects of a Reset on CTMU
Upon Reset, all registers of the CTMU are cleared. This
disables the CTMU module, turns off its current source
and returns all configuration options to their default set-
tings. The module needs to be re-initialized following
any Reset.
If the CTMU is in the process of taking a measurement
at the time of Reset, the measurement will be lost. A
partial charge may exist on the circuit that was being
measured, which should be properly discharged before
the CTMU makes subsequent attempts to make a
measurement. The circuit is discharged by setting and
clearing the IDISSEN bit (CTMUCONH<1>) while the
A/D Converter is connected to the appropriate channel.
CTMUIF
CTMUIE
CTMUIP
EDGEN
ITRIM1
Bit 3
—
EDGSEQEN
CCP2IE
CCP2IP
CCP2IF
ITRIM0
Bit 2
—
2011 Microchip Technology Inc.
IDISSEN
CCP1IF
CCP1IE
CCP1IP
IRNG1
Bit 1
—
CTMUDS
CTTRIG
IRNG0
Bit 0
—
—
—
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