PIC18F87J50T-I/PT Microchip Technology, PIC18F87J50T-I/PT Datasheet - Page 150

• Manufacturer Part Number: PIC18F87J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F87J50T-I/PTTR

PIC18F87J50 FAMILY
TABLE 10-10: PORTD FUNCTIONS
DS39775C-page 150
RD0/AD0/
PMD0
RD1/AD1/
PMD1
RD2/AD2/
PMD2
RD3/AD3/
PMD3
RD4/AD4/
PMD4/SDO2
RD5/AD5/
PMD5/SDI2/
SDA2
Legend:
Note 1:
Pin Name
2:
3:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PMP I/O.
Available on 80-pin devices only.
When PMPMX = 1.
Function
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
AD0
AD1
AD2
AD3
AD4
AD5
SDO2
SDA2
SDI2
RD0
RD1
RD2
RD3
RD4
RD5
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(2)
(2)
(2)
(2)
(2)
(3)
(3)
(3)
(3)
(3)
(3)
Setting
TRIS
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
0
1
x
x
x
x
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
DIG
TTL
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output.
PORTD<0> data input.
External memory interface, address/data bit 0 output.
External memory interface, data bit 0 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<1> data output.
PORTD<1> data input.
External memory interface, address/data bit 1 output.
External memory interface, data bit 1 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<2> data output.
PORTD<2> data input.
External memory interface, address/data bit 2 output.
External memory interface, data bit 2 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<3> data output.
PORTD<3> data input.
External memory interface, address/data bit 3 output.
External memory interface, data bit 3 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<4> data output.
PORTD<4> data input.
External memory interface, address/data bit 4 output.
External memory interface, data bit 4 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI data output (MSSP2 module); takes priority over port data.
LATD<5> data output.
PORTD<5> data input.
External memory interface, address/data bit 5 output.
External memory interface, data bit 5 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI data input (MSSP2 module).
I
I
2
2
C™ data output (MSSP2 module); takes priority over port data.
C data input (MSSP2 module); input type depends on module setting.
Description
© 2009 Microchip Technology Inc.
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