PIC18LF14K22-E/ML Microchip Technology, PIC18LF14K22-E/ML Datasheet - Page 234
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PIC18LF14K22-E/ML
Manufacturer Part Number
PIC18LF14K22-E/ML
Description
16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 QFN 4x4mm TUB
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18LF13K22-ISS.pdf
(388 pages)
Specifications of PIC18LF14K22-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
18
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
A/d Bit Size
10 bit
A/d Channels Available
12
Height
0.88 mm
Length
4 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.8 V, 2.7 V
Width
4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F1XK22/LF1XK22
18.1.3
The power-managed mode that is invoked with the
SLEEP instruction is determined by the setting of the
IDLEN bit of the OSCCON register at the time the
instruction is executed. All clocks stop and minimum
power is consumed when SLEEP is executed with the
IDLEN bit cleared. The system clock continues to sup-
ply a clock to the peripherals but is disconnected from
the CPU when SLEEP is executed with the IDLEN bit
set.
18.2
In the Run modes, clocks to both the core and
peripherals are active. The difference between these
modes is the clock source.
18.2.1
The PRI_RUN mode is the normal, full power execution
mode of the microcontroller. This is also the default
mode upon a device Reset, unless Two-Speed Start-
up is enabled (see Section 2.11 “Two-Speed Start-up
Mode” for details). In this mode, the device operated
off the oscillator defined by the FOSC bits of the
CONFIGH Configuration register.
18.2.2
In SEC_RUN mode, the CPU and peripherals are
clocked from the secondary external oscillator. This
gives users the option of lower power consumption
while still using a high accuracy clock source.
SEC_RUN mode is entered by setting the SCS<1:0>
bits of the OSCCON register to ‘01’. When SEC_RUN
mode is active all of the following are true:
• The main clock source is switched to the
• Primary external oscillator is shut down
• T1RUN bit of the T1CON register is set
• OSTS bit is cleared.
DS41365D-page 234
secondary external oscillator
Note:
Run Modes
MULTIPLE FUNCTIONS OF THE
SLEEP COMMAND
PRI_RUN MODE
SEC_RUN MODE
The secondary external oscillator should
already be running prior to entering
SEC_RUN mode. If the T1OSCEN bit is
not set when the SCS<1:0> bits are set to
‘01’, entry to SEC_RUN mode will not
occur until T1OSCEN bit is set and sec-
ondary external oscillator is ready.
Preliminary
18.2.3
In RC_RUN mode, the CPU and peripherals are
clocked from the internal oscillator. In this mode, the
primary external oscillator is shut down. RC_RUN
mode provides the best power conservation of all the
Run modes when the LFINTOSC is the system clock.
RC_RUN mode is entered by setting the SCS1 bit.
When the clock source is switched from the primary
oscillator to the internal oscillator, the primary oscillator
is shut down and the OSTS bit is cleared. The IRCF bits
may be modified at any time to immediately change the
clock speed.
RC_RUN MODE
2010 Microchip Technology Inc.
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