PIC18LF14K22-E/SO Microchip Technology, PIC18LF14K22-E/SO Datasheet - Page 40
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PIC18LF14K22-E/SO
Manufacturer Part Number
PIC18LF14K22-E/SO
Description
16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 SOIC .300in T
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18LF13K22-ISS.pdf
(388 pages)
Specifications of PIC18LF14K22-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F1XK22/LF1XK22
TABLE 3-2:
DS41365D-page 40
TMR0H
TMR0L
T0CON
OSCCON
OSCCON2
WDTCON
RCON
TMR1H
TMR1L
T1CON
TMR2
PR2
T2CON
SSPBUF
SSPADD
SSPSTAT
SSPCON1
SSPCON2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
CCPR1H
CCPR1L
CCP1CON
VREFCON2
VREFCON1
VREFCON0
PSTRCON
BAUDCON
PWM1CON
ECCP1AS
TMR3H
TMR3L
T3CON
Legend:
Note
File Name
1:
2:
Timer0 Register, High Byte
Timer0 Register, Low Byte
Timer1 Register, High Byte
Timer1 Register, Low Bytes
Timer2 Register
Timer2 Period Register
SSP Receive Buffer/Transmit Register
SSP Address Register in I
A/D Result Register, High Byte
A/D Result Register, Low Byte
Capture/Compare/PWM Register 1, High Byte
Capture/Compare/PWM Register 1, Low Byte
Timer3 Register, High Byte
Timer3 Register, Low Byte
x = unknown, u = unchanged, — = unimplemented, q = value depends on condition
The SBOREN bit is only available when the BOREN<1:0> Configuration bits = 01; otherwise it is disabled and reads as ‘0’. See
Section 21.4 “Brown-out Reset (BOR)”.
The RA3 bit is only available when Master Clear Reset is disabled (MCLRE Configuration bit = 0). Otherwise, RA3 reads as ‘0’. This bit is
read-only.
ECCPASE
TMR0ON
ABDOVF
FVR1EN
PRSEN
IDLEN
WCOL
GCEN
ADFM
RD16
P1M1
D1EN
RD16
Bit 7
IPEN
SMP
—
—
—
—
—
—
—
REGISTER FILE SUMMARY (PIC18F1XK22/LF1XK22) (CONTINUED)
SBOREN
T2OUTPS3 T2OUTPS2 T2OUTPS1
ECCPAS2
ACKSTAT
FVR1ST
T08BIT
T1RUN
SSPOV
D1LPS
RCIDL
IRCF2
PDC6
P1M0
Bit 6
CKE
—
—
—
—
—
—
—
—
(1)
2
C™ Slave Mode. SSP Baud Rate Reload Register in I
ECCPAS1
T3CKPS1
T1CKPS1
DAC1OE
FVR1S1
SSPEN
ACKDT
ACQT2
DC1B1
DTRXP
IRCF1
T0CS
CHS3
PDC5
Bit 5
D/A
—
—
—
—
—
—
STRSYNC
ECCPAS0
T1CKPS0
T3CKPS0
DAC1R4
FVR1S0
ACKEN
ACQT1
CKTXP
DC1B0
IRCF0
CHS2
PDC4
T0SE
Bit 4
CKP
—
—
RI
—
---
P
Preliminary
T2OUTPS0
T1OSCEN
PVCFG1
CCP1M3
DAC1R3
D1PSS1
PSSAC1
T3CCP1
SSPM3
ACQT0
BRG16
RCEN
OSTS
CHS1
STRD
PDC3
Bit 3
PSA
TO
—
—
—
S
TMR2ON
PVCFG0
CCP1M2
T1SYNC
DAC1R2
D1PSS0
PSSAC0
T3SYNC
HFIOFS
PRI_SD
SSPM2
ADCS2
T0PS2
STRC
CHS0
PDC2
Bit 2
PEN
R/W
PD
—
—
—
2
C Master Mode.
GO/DONE
T2CKPS1
TMR1CS
TMR3CS
NVCFG1
CCP1M1
DAC1R1
PSSBD1
HFIOFL
SSPM1
ADCS1
T0PS1
RSEN
STRB
PDC1
SCS1
WUE
Bit 1
POR
UA
—
—
—
2010 Microchip Technology Inc.
T2CKPS0
SWDTEN
TMR1ON
TMR3ON
NVCFG0
CCP1M0
DAC1R0
PSSBD0
LFIOFS
SSPM0
ABDEN
ADCS0
D1NSS
T0PS0
ADON
STRA
PDC0
SCS0
Bit 0
BOR
SEN
BF
—
0000 0000 258, 98
xxxx xxxx 258, 98
1111 1111 258, 97
0011 qq00 258, 20
---- -10x 258, 21
0q-1 11q0
xxxx xxxx 258, 101
xxxx xxxx 258, 101
0000 0000 258, 101
0000 0000 258, 107
1111 1111 258, 107
-000 0000 258, 107
xxxx xxxx
0000 0000 258, 155
0000 0000
0000 0000
0000 0000 258, 147
xxxx xxxx 259, 207
xxxx xxxx 259, 207
--00 0000 259, 213
---- 0000 259, 214
0-00 0000 259, 215
xxxx xxxx 259, 133
xxxx xxxx 259, 133
0000 0000 259, 113
---0 0000 259, 246
000- 00-0 259, 246
0001 ---- 259, 245
---0 0001 259, 130
0100 0-00 259, 190
0000 0000 259, 129
0000 0000 259, 125
xxxx xxxx 259, 109
xxxx xxxx 259, 109
0-00 0000 259, 109
POR, BOR
--- ---0 258, 272
Value on
136, 138
136, 145
136, 146
Details
256, 67
page:
249,
258,
258,
258,
on
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