PIC18LF25K22-E/SO Microchip Technology, PIC18LF25K22-E/SO Datasheet - Page 191
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PIC18LF25K22-E/SO
Manufacturer Part Number
PIC18LF25K22-E/SO
Description
32KB, Flash, 1536bytes-RAM,8-bit Family,nanoWatt XLP 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.4.1
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCPx/PxA pin, while the complementary PWM
output signal is output on the PxB pin (see
This mode can be used for Half-Bridge applications, as
shown in
where four power switches are being modulated with
two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in Half-
Bridge power devices. The value of the PDC<6:0> bits of
the PWMxCON register sets the number of instruction
cycles before the output is driven active. If the value is
greater than the duty cycle, the corresponding output
remains
Section 14.4.5 “Programmable Dead-Band Delay
Mode”
operations.
FIGURE 14-9:
2010 Microchip Technology Inc.
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
for more details of the dead-band delay
Figure
inactive
HALF-BRIDGE MODE
14-9, or for Full-Bridge applications,
during
EXAMPLE OF HALF-BRIDGE APPLICATIONS
the
PxA
PxB
entire
Figure
cycle.
PxA
PxB
FET
Driver
FET
Driver
14-9).
See
Preliminary
FET
Driver
FET
Driver
Since the PxA and PxB outputs are multiplexed with the
PORT data latches, the associated TRIS bits must be
cleared to configure PxA and PxB as outputs.
FIGURE 14-8:
PxA
PxB
td = Dead-Band Delay
Note 1: At this time, the TMRx register is equal to the
Load
PIC18(L)F2X/4XK22
V+
(2)
(2)
2: Output signals are shown as active-high.
(1)
td
PRx register.
Pulse Width
Load
Period
td
FET
Driver
FET
Driver
EXAMPLE OF HALF-
BRIDGE PWM OUTPUT
+
-
+
-
(1)
DS41412D-page 191
Period
(1)
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