PIC18LF25K22-E/SO Microchip Technology, PIC18LF25K22-E/SO Datasheet - Page 240
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PIC18LF25K22-E/SO
Manufacturer Part Number
PIC18LF25K22-E/SO
Description
32KB, Flash, 1536bytes-RAM,8-bit Family,nanoWatt XLP 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18(L)F2X/4XK22
15.6.4 I
To initiate a Start condition, the user sets the Start
Enable bit, SEN, of the SSPxCON2 register. If the
SDAx and SCLx pins are sampled high, the Baud Rate
Generator is reloaded with the contents of SSPx-
ADD<7:0> and starts its count. If SCLx and SDAx are
both sampled high when the Baud Rate Generator
times out (T
action of the SDAx being driven low while SCLx is high
is the Start condition and causes the S bit of the
SSPxSTAT1 register to be set. Following this, the
Baud Rate Generator is reloaded with the contents of
SSPxADD<7:0> and resumes its count. When the
Baud Rate Generator times out (T
the SSPxCON2 register will be automatically cleared
FIGURE 15-26:
DS41412D-page 240
CONDITION TIMING
2
C MASTER MODE START
BRG
), the SDAx pin is driven low. The
FIRST START BIT TIMING
Write to SEN bit occurs here
SDAx
SCLx
BRG
), the SEN bit of
SDAx = 1,
SCLx = 1
T
BRG
Preliminary
S
Set S bit (SSPxSTAT<3>)
T
BRG
At completion of Start bit,
hardware clears SEN bit
by hardware; the Baud Rate Generator is suspended,
leaving the SDAx line held low and the Start condition
is complete.
and sets SSPxIF bit
Note 1: If at the beginning of the Start condition,
Write to SSPxBUF occurs here
T
BRG
2: The Philips I
1st bit
the SDAx and SCLx pins are already sam-
pled low, or if during the Start condition,
the SCLx line is sampled low before the
SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I
its Idle state.
bus collision cannot occur on a Start.
T
BRG
2010 Microchip Technology Inc.
2
C Specification states that a
2nd bit
2
C module is reset into
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