PIC24FJ128GA308-I/PT Microchip Technology, PIC24FJ128GA308-I/PT Datasheet - Page 279

• Manufacturer Part Number: PIC24FJ128GA308-I/PT
• Description: 16-bit, 16 MIPS, 128 KB Flash, 8 KB RAM, 69 I/O, LCD, XLP W/Vbat 80 TQFP 12x12x1
• Manufacturer: Microchip Technology

REGISTER 22-2:
 2010-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9-8
bit 7-0
Note 1:
PWCEN
R/W-0
U-0
—
2:
The RTCPWC register is only affected by a POR.
When a new value is written to these register bits, the lower half of the MINSEC register should also be
written to properly reset the clock prescalers in the RTCC.
PWCEN: Power Control Enable bit
1 = Power control is enabled
0 = Power control is disabled
PWCPOL: Power Control Enable bit
1 = Power control is enabled
0 = Power control is disabled
PWCPRE: Power Control/Stability Prescaler bits
1 = PWC stability window clock is divide-by-2 of source RTCC clock
0 = PWC stability window clock is divide-by-1 of source RTCC clock
PWSPRE: Power Control Sample Prescaler bits
1 = PWC sample window clock is divide-by-2 of source RTCC clock
0 = PWC sample window clock is divide-by-1 of source RTCC clock
RTCLK<1:0>: RTCC Clock Source Select bits
11 = External power line (60 Hz)
10 = External power line source (50 Hz)
01 = Internal LPRC Oscillator
00 = External Secondary Oscillator (SOSC)
RTCOUT<1:0>: RTCC Output Source Select bits
11 = Power control
10 = RTCC clock
01 = RTCC seconds clock
00 = RTCC alarm pulse
Unimplemented: Read as ‘0’
PWCPOL
R/W-0
U-0
—
RTCPWC: RTCC POWER CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
PWCPRE
R/W-0
U-0
—
PWSPRE
PIC24FJ128GA310 FAMILY
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RTCLK1
(2)
R/W-0
U-0
—
(2)
RTCLK0
R/W-0
(1)
U-0
—
(2)
x = Bit is unknown
RTCOUT1
R/W-0
U-0
—
DS39996F-page 279
RTCOUT0
R/W-0
U-0
—
bit 8
bit 0