PIC24FJ32GA104-I/PT Microchip Technology, PIC24FJ32GA104-I/PT Datasheet - Page 162

16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY

PIC24FJ32GA104-I/PT

Manufacturer Part Number
PIC24FJ32GA104-I/PT
Description
16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 44 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24FJ32GA104-I/PT

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1004 - PIC24 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
PIC24FJ32GA104-I/PT
Manufacturer:
Microchip
Quantity:
567
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PIC24FJ32GA104-I/PT
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Microchip Technology
Quantity:
10 000
Part Number:
PIC24FJ32GA104-I/PT
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PIC24FJ64GA104 FAMILY
REGISTER 14-1:
DS39951C-page 162
bit 2-0
Note 1:
2:
The OCx output must also be configured to an available RPn pin. For more information, see Section 10.4
“Peripheral Pin Select (PPS)”.
The comparator module used for Fault input varies with the OCx module. OC1 and OC2 use Comparator 1;
OC3 and OC4 use Comparator 2; OC5 uses Comparator 3.
OCM<2:0>: Output Compare x Mode Select bits
111 = Center-Aligned PWM mode on OCx
110 = Edge-Aligned PWM mode on OCx
101 = Double Compare Continuous Pulse mode: initialize OCx pin low, toggle OCx state continuously
100 = Double Compare Single-Shot mode: initialize OCx pin low, toggle OCx state on matches of
011 = Single Compare Continuous Pulse mode: compare events continuously toggle OCx pin
010 = Single Compare Single-Shot mode: initialize OCx pin high, compare event forces OCx pin low
001 = Single Compare Single-Shot mode: initialize OCx pin low, compare event forces OCx pin high
000 = Output compare channel is disabled
OCxCON1: OUTPUT COMPARE x CONTROL REGISTER 1 (CONTINUED)
on alternate matches of OCxR and OCxRS
OCxR and OCxRS for one cycle
(1)
 2010 Microchip Technology Inc.

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