PIC24HJ12GP202-E/ML Microchip Technology, PIC24HJ12GP202-E/ML Datasheet - Page 236

12KB, Flash, 1024bytes-RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN 6x6mm T

PIC24HJ12GP202-E/ML

Manufacturer Part Number
PIC24HJ12GP202-E/ML
Description
12KB, Flash, 1024bytes-RAM, 40MIPS, 21I/O, 16-bit Family,nanoWatt 28 QFN 6x6mm T
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ12GP202-E/ML

Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ12GP202-E/ML
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24HJ12GP201/202
Internal RC Oscillator
Internet Address................................................................ 237
Interrupt Control and Status Registers................................ 59
Interrupt Setup Procedures ................................................. 81
Interrupt Vector Table (IVT) ................................................ 55
Interrupts Coincident with Power Save Instructions............ 94
J
JTAG Boundary Scan Interface ........................................ 163
JTAG Interface .................................................................. 168
M
Memory Organization.......................................................... 21
Microchip Internet Web Site .............................................. 237
MPLAB ASM30 Assembler, Linker, Librarian ................... 180
MPLAB ICD 2 In-Circuit Debugger.................................... 181
MPLAB ICE 2000 High-Performance Universal In-Circuit Em-
MPLAB Integrated Development Environment Software .. 179
MPLAB PM3 Device Programmer..................................... 181
MPLAB REAL ICE In-Circuit Emulator System................. 181
MPLINK Object Linker/MPLIB Object Librarian ................ 180
Multi-Bit Data Shifter ........................................................... 20
N
NVM Module
O
Open-Drain Configuration ................................................... 98
Oscillator Configuration....................................................... 83
Output Compare................................................................ 125
P
Packaging ......................................................................... 217
Peripheral Module Disable (PMD)....................................... 94
Peripheral Pin Select Module
PICSTART Plus Development Programmer ..................... 182
Pinout I/O Descriptions (table) .............................................. 9
PMD Module
PORTA
PORTB
Power-on Reset (POR) ....................................................... 52
Power-Saving Features....................................................... 93
Program Address Space ..................................................... 21
DS70282D-page 234
Use with WDT ........................................................... 167
IECx ............................................................................ 59
IFSx............................................................................. 59
INTCON1 .................................................................... 59
INTCON2 .................................................................... 59
IPCx ............................................................................ 59
Initialization ................................................................. 81
Interrupt Disable.......................................................... 81
Interrupt Service Routine ............................................ 81
Trap Service Routine .................................................. 81
ulator ......................................................................... 181
Register Map............................................................... 34
Registers ................................................................... 127
Details ....................................................................... 219
Marking ............................................................. 217, 218
Input Register Map...................................................... 30
Output Register Map for PIC24HJ12GP202 ............... 30
Register Map............................................................... 34
Register Map............................................................... 33
Register Map for PIC24HJ12GP201 ........................... 33
Register Map for PIC24HJ12GP202 ........................... 33
Clock Frequency and Switching.................................. 93
Construction ................................................................ 37
Preliminary
Program Memory
R
Reader Response............................................................. 238
Registers
Data Access from Program Memory Using Program
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation ..................... 38
Memory Map for PIC24HJ12GP201/202 .................... 21
Table Read Instructions
Visibility Operation ...................................................... 40
Interrupt Vector ........................................................... 22
Organization ............................................................... 22
Reset Vector ............................................................... 22
AD1CHS0 (ADC1 Input Channel 0 Select ................ 160
AD1CHS123 (ADC1 Input Channel 1, 2, 3 Select)... 157
AD1CON1 (ADC1 Control 1) .................................... 153
AD1CON2 (ADC1 Control 2) .................................... 155
AD1CON3 (ADC1 Control 3) .................................... 156
AD1CSSL (ADC1 Input Scan Select Low)................ 162
AD1PCFGL (ADC1 Port Configuration Low) ............ 162
CLKDIV (Clock Divisor) .............................................. 88
CORCON (Core Control) ...................................... 19, 61
I2CxCON (I2Cx Control) ........................................... 137
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 141
I2CxSTAT (I2Cx Status) ........................................... 139
ICxCON (Input Capture x Control)............................ 124
IEC0 (Interrupt Enable Control 0) ............................... 68
IEC1 (Interrupt Enable Control 0) ............................... 70
IEC4 (Interrupt Enable Control 0) ............................... 71
IFS0 (Interrupt Flag Status 0) ..................................... 64
IFS1 (Interrupt Flag Status 1) ..................................... 66
IFS4 (Interrupt Flag Status 4) ..................................... 67
INTCON1 (Interrupt Control 1).................................... 62
INTCON2 (Interrupt Control 2).................................... 63
INTTREG Interrupt Control and Status Register ........ 80
IPC0 (Interrupt Priority Control 0) ............................... 72
IPC1 (Interrupt Priority Control 1) ............................... 73
IPC16 (Interrupt Priority Control 16) ........................... 79
IPC2 (Interrupt Priority Control 2) ............................... 74
IPC3 (Interrupt Priority Control 3) ............................... 75
IPC4 (Interrupt Priority Control 4) ............................... 76
IPC5 (Interrupt Priority Control 5) ............................... 77
IPC7 (Interrupt Priority Control 7) ............................... 78
NVMCON (Flash Memory Control) ............................. 43
NVMKEY (Nonvolatile Memory Key) .......................... 44
OCxCON (Output Compare x Control) ..................... 127
OSCCON (Oscillator Control) ..................................... 86
OSCTUN (FRC Oscillator Tuning).............................. 90
PLLFBD (PLL Feedback Divisor)................................ 89
PMD1 (Peripheral Module Disable Control Register 1) ..
PMD2 (Peripheral Module Disable Control Register 2) ..
RCON (Reset Control)................................................ 48
SPIxCON1 (SPIx Control 1)...................................... 131
SPIxCON2 (SPIx Control 2)...................................... 133
SPIxSTAT (SPIx Status and Control) ....................... 130
SR (CPU Status)................................................... 18, 60
T1CON (Timer1 Control) .......................................... 116
T2CON Control ......................................................... 120
T3CON Control ......................................................... 121
Space Visibility ................................................... 40
tions .................................................................... 39
TBLRDH ............................................................. 39
TBLRDL.............................................................. 39
95
96
© 2009 Microchip Technology Inc.

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