S29JL032J70TFI420 Spansion Inc., S29JL032J70TFI420 Datasheet - Page 3

• Manufacturer Part Number: S29JL032J70TFI420
• Description: IC 3V 32M SIMULTANEOUS READ/WRITE FLASH
• Manufacturer: Spansion Inc.

Specifications of S29JL032J70TFI420

• Cell Type: NOR
• Density: 32Mb
• Access Time (max): 70ns
• Interface Type: Serial
• Boot Type: Bottom
• Address Bus: 22/21Bit
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 4M/2M
• Supply Current: 16mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Distinctive Characteristics
General Description
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual-
ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document
may be revised by subsequent versions or modifications due to changes in technical specifications.
Architectural Advantages
 Simultaneous Read/Write operations
 Multiple bank architecture
 Boot sectors
 Manufactured on 0.11 µm Process Technology
 Secured Silicon Region: Extra 256 byte sector
 Zero power operation
 Compatible with JEDEC standards
Package Options
 48-ball Fine-pitch BGA
 48-pin TSOP
Performance Characteristics
 High performance
The S29JL032J is a 32 Mbit, 3.0 volt-only flash memory device, organized as 2,097,152 words of 16 bits each or 4,194,304
bytes of 8 bits each. Word mode data appears on DQ15–DQ0; byte mode data appears on DQ7–DQ0. The device is designed
to be programmed in-system with the standard 3.0 volt V
programmers. The device is available with an access time of 60, or 70 ns and is offered in a 48-ball FBGA or a 48-pin TSOP
package. Standard control pins—chip enable (CE#), write enable (WE#), and output enable (OE#)—control normal read and
write operations, and avoid bus contention issues. The device requires only a single 3.0 volt power supply for both read and
write functions. Internally generated and regulated voltages are provided for the program and erase operations.
S29JL032J
32 Megabit (4 M x 8-Bit/2 M x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Read/Write
Flash Memory
Data Sheet (Preliminary)
– Data can be continuously read from one bank while executing
– Zero latency between read and write operations
– Four bank architectures available (refer to
– Top or bottom boot sectors in the same device
– Any combination of sectors can be erased
– Factory locked and identifiable: 16 bytes available for secure,
– Customer lockable: One-time programmable only. Once locked,
– Sophisticated power management circuits reduce power consumed
– Pinout and software compatible with single-power-supply flash
– Access time as fast as 60 ns
– Program time: 6 µs/word typical using accelerated programming
erase/program functions in another bank.
random factory Electronic Serial Number; verifiable as factory
locked through autoselect function
data cannot be changed
during inactive periods to nearly zero.
standard
function
Publication Number S29JL032J_00
Table 8.2 on page
18).
CC
supply, and can also be programmed in standard EPROM
Revision 03
 Ultra low power consumption (typical values)
 Cycling endurance: 1 million cycles per sector typical
 Data retention: 20 years typical
Software Features
 Supports Common Flash Memory Interface (CFI)
 Erase suspend/Erase resume
 Data# polling and toggle bits
 Unlock bypass program command
Hardware Features
 Ready/Busy# output (RY/BY#)
 Hardware reset pin (RESET#)
 WP#/ACC input pin
 Sector protection
– 2 mA active read current at 1 MHz
– 10 mA active read current at 5 MHz
– 200 nA in standby or automatic sleep mode
– Suspends erase operations to read data from, or program data to, a
– Provides a software method of detecting the status of program or
– Reduces overall programming time when issuing multiple program
– Hardware method for detecting program or erase cycle completion
– Hardware method of resetting the internal state machine to the read
– Write protect (WP#) function protects the two outermost boot
– Acceleration (ACC) function accelerates program timing
– Hardware method to prevent any program or erase operation within
– Temporary Sector Unprotect allows changing data in protected
sector that is not being erased, then resumes the erase operation.
erase operations
command sequences
mode
sectors regardless of sector protect status
a sector
sectors in-system
Issue Date August 25, 2010