SST25VF064C-80-4C-Q2AE Microchip Technology, SST25VF064C-80-4C-Q2AE Datasheet - Page 3

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SST25VF064C-80-4C-Q2AE

Manufacturer Part Number
SST25VF064C-80-4C-Q2AE
Description
2.7V To 3.6V 64Mbit SPI Serial Flash 8 TDFN 6x8x0.8mm TRAY
Manufacturer
Microchip Technology
Datasheet

Specifications of SST25VF064C-80-4C-Q2AE

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
64M (8M x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-WDFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SST25VF064C-80-4C-Q2AE
Manufacturer:
FSC
Quantity:
1 200
64 Mbit SPI Serial Dual I/O Flash
SST25VF064C
PIN DESCRIPTION
TABLE 1: Pin Description
©2010 Silicon Storage Technology, Inc.
Symbol
SCK
SI
SO
SIO[0:1]
CE#
WP#
RST#/HOLD#
V
V
DD
SS
FIGURE 2: Pin Assignments for 16-Lead SOIC, 8-Contact WSON, and 8-Lead SOIC
RST#/HOLD#
SO/SIO 1
V DD
CE#
NC
NC
NC
NC
Pin Name
Serial Clock
Serial Data Input
Serial Data Output
Serial Data Input/
Output for Dual I/O
Mode
Chip Enable
Write Protect
Reset
Hold
Power Supply
Ground
Top View
Functions
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock
input, while output data is shifted out on the falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
To transfer commands, addresses, or data serially into the device, or data out of the
device.
Inputs are latched on the rising edge of the serial clock.
Data is shifted out on the falling edge of the serial clock. These pins are for Dual I/O
mode.
The device is enabled by a high to low transition on CE#. CE# must remain low for
the duration of any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
To reset the operation of the device and the internal logic. The device powers on with
RST# pin functionality as default.
To temporarily stop serial communication with SPI Flash memory while device is
selected. This is selected by an instruction sequence. See “Reset/Hold Mode” page 5
for details.
To provide power supply voltage: 2.7-3.6V
1392 16-SOIC P1.0
SCK
SI/SIO 0
NC
NC
NC
NC
V SS
WP#
3
SO/SIO 1
WP#
CE#
V SS
WP#
CE#
V SS
SO
1
2
3
4
1
2
3
4
Top View
Top View
8
7
6
5
8
7
6
5
1392 8-soic S3A P1.0
1392 8-WSON P1.0
V DD
RST#/HOLD#
SCK
SI/SIO 0
V DD
RST#/HOLD#
SCK
SI
S71392-04-000
Data Sheet
T1.0 1392
04/10

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