STK11C68-SF25 Cypress Semiconductor Corp, STK11C68-SF25 Datasheet - Page 3

• Manufacturer Part Number: STK11C68-SF25
• Description: STK11C68-SF25
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of STK11C68-SF25

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 64K (8K x 8)
• Speed: 25ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (8.69mm width)
• Word Size: 8b
• Organization: 8Kx8
• Density: 64Kb
• Interface Type: Parallel
• Access Time (max): 25ns
• Operating Supply Voltage (typ): 5V
• Package Type: SOIC
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temp Range: 0C to 70C
• Pin Count: 28
• Mounting: Surface Mount
• Supply Current: 90mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin Configurations
Pin Definitions
Document Number: 001-50638 Rev. *A
Pin Name
DQ
A
0
V
V
WE
OE
CE
0
–A
SS
CC
-DQ
12
7
Alt
W
G
E
Power Supply Power Supply Inputs to the Device.
I/O Type
Input or
Ground
Output
Input
Input
Input
Input
Figure 1. Pin Diagram - 28-Pin SOIC/DIP and 28-Pin LLC
Address Inputs. Used to select one of the 8,192 bytes of the nvSRAM.
Bidirectional Data I/O Lines. Used as input or output lines depending on operation.
Write Enable Input, Active LOW. When the chip is enabled and WE is LOW, data on the
I/O pins is written to the specific address location.
Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the
chip.
Output Enable, Active LOW. The active LOW OE input enables the data output buffers
during read cycles. Deasserting OE HIGH causes the I/O pins to tristate.
Ground for the Device. The device is connected to ground of the system.
Description
STK11C68
Page 3 of 17
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