SCN68681E1A44 NXP Semiconductors, SCN68681E1A44 Datasheet - Page 23

• Manufacturer Part Number: SCN68681E1A44
• Manufacturer: NXP Semiconductors

Specifications of SCN68681E1A44

• Transmitter And Receiver Fifo Counter: No
• Operating Supply Voltage (typ): 5V
• Package Type: PLCC
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Mounting: Surface Mount
• Pin Count: 44
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Number Of Channels: 2
• Lead Free Status / RoHS Status: Not Compliant

OP7. The data source for output ports OP0 and OP1 is controlled by
transmitter. Therefore, one could say that RTS and CTS are different
Philips Semiconductors
Output Port Notes
The output ports are controlled from three places: the OPCR
register, the OPR register, and the MR registers. The OPCR register
controls the source of the data for the output ports OP2 through
the MR and CR registers. When the OPR is the source of the data
for the output ports, the data at the ports is inverted from that in the
OPR register. The content of the OPR register is controlled by the
“Set Output Port Bits Command”. These commands are at E and F,
respectively. When these commands are used, action takes place
only at the bit locations where ones exist. For example, a one in bit
location 5 of the data word used with the “Set Output Port Bits”
command will result in OPR5 being set to one. The OP5 would then
be set to zero (V
word associated with the “Reset Output Ports Bits” command would
set OPR5 to zero, and hence, the pin OP5 to a one (V
The CTS, RTS, CTS Enable Tx signals
CTS (Clear To Send) is usually meant to be a signal to the
transmitter meaning that it may transmit data to the receiver. The
CTS input is on pin MPI. The CTS signal is active LOW; thus, it is
called CTS.
RTS is usually meant to be a signal from the receiver indicating that
the receiver is ready to receive data. It is also active LOW and is,
thus, called RTSN. RTSN is on pin MP0. A receiver’s RTS output
will usually be connected to the CTS input of the associated
ends of the same wire!
MR2(4) is the bit that allows the transmitter to be controlled by the
CTS pin (MPI). When this bit is set to one AND the CTS input is
driven HIGH, the transmitter will stop sending data at the end of the
2004 Mar 02
Dual asynchronous receiver/transmitter (DUART)
TRANSMITTER
RECEIVER
ENABLED
ENABLED
(WRITE)
RxRDY
TxRDY
(SR2)
(SR0)
CSN
CSN
RxD
TxD
MR1(4:3) = 11
SS
MASTER STATION
PERIPHERAL STATION
MR1(4+3) = 11
). Similarly, a one in bit position 5 of the data
MR1(2) = 1
ADD#1 MR1(2) = 0 D0
BIT 9
0
ADD#1
ADD#1 1
BIT 9
1
BIT 9
DD
).
ADD#1
Figure 15. Wake-Up Mode
D0
D0
BIT 9
0
BIT 9
0
23
STATUS DATA
pin, its meaning is not RTS at all. It is, rather, that the transmitter has
generate the proper RTS signal. The logic at the output is basically a
present character being serialized. It is usually the RTS output of the
with four valid characters in the receiver. When MR2(4) is set to one,
the receiver. When the RTS flow control is selected via the MR(7) bit
receiver that will be connected to the transmitter’s CTS input. The
receiver will set RTS HIGH when the receiver FIFO is full AND the
start bit of the fourth character is sensed. Transmission then stops
CTSN must be at zero for the transmitter to operate. If MR2(4) is set
to zero, the MP pin will have no effect on the operation of the
transmitter.
MR1(7) is the bit that allows the receiver to control MP0. When MP0
is controlled by the receiver, the meaning of that pin will be RTS.
However, a point of confusion arises in that MP0 may also be
controlled by the transmitter. When the transmitter is controlling this
finished sending its last data byte. Programming the MP0 pin to be
controlled by the receiver and the transmitter at the same time is
allowed, but would usually be incompatible.
RTS is expressed at the MP0 pin which is still an output port.
Therefore, the state of MP0 should be set LOW for the receiver to
NAND of the MP0 bit register and the RTS signal as generated by
the state of the MP0 register is not changed. Terminating the use of
“Flow Control” (via the MR registers) will return the MP0 pin to the
control of the MP0 register.
Transmitter Disable Note
The sequence of instructions enable transmitter — load transmit
holding register — disable transmitter will result in nothing being
sent if the time between the end of loading the transmit holding
register and the disable command is less that 3/16 bit time in the
16x mode or one bit time in the 1x mode. Also, if the transmitter,
D0
MR1(2) = 1 ADD#2
ADD#2 1
ADD#2 1
BIT 9
BIT 9
SCN68681
STATUS DATA
ADD#2
Product data
BIT 9
0
SD00120