SC16C654DBIB64 NXP Semiconductors, SC16C654DBIB64 Datasheet - Page 24
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SC16C654DBIB64
Manufacturer Part Number
SC16C654DBIB64
Description
IC, UART, QUAD, 64BYTE FIFO, 16C654
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C654BIA68.pdf
(58 pages)
Specifications of SC16C654DBIB64
Data Rate
5Mbps
Transmit Fifo
64Byte
Receive Fifo
64Byte
Transmitter And Receiver Fifo Counter
Yes
Package Type
LQFP
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
No. Of Channels
4
Supply Voltage Range
2.25V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
64
Svhc
No SVHC (18-Jun-2010)
Uart Features
Programmable Xon/Xoff Characters, Software Selectable Baud Rate Generator
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC16C654DBIB64,128
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC16C654DBIB64,151
Manufacturer:
NXP
Quantity:
144
Company:
Part Number:
SC16C654DBIB64,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC16C654DBIB64,157
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Company:
Part Number:
SC16C654DBIB64151
Manufacturer:
NXP Semiconductors
Quantity:
135
Philips Semiconductors
7. Register descriptions
Table 8:
[1]
[2]
[3]
[4]
[5]
[6]
9397 750 14965
Product data sheet
A2 A1 A0 Register Default
General Register Set
0
0
0
0
0
0
1
1
1
1
Special Register Set
0
0
Enhanced Register Set
0
1
1
1
1
The value shown represents the register’s initialized HEX value; X = not applicable.
These registers are accessible only when LCR[7] = 0.
These bits are only accessible when EFR[4] is set.
This function is not supported in the HVQFN48 package; TXRDY and RXRDY are removed.
The Special Register set is accessible only when LCR[7] is set to a logic 1.
Enhanced Feature Register, Xon1/Xon2 and Xoff1/Xoff2 are accessible only when LCR is set to ‘BFh’.
0
0
0
1
1
1
0
0
1
1
0
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
0
1
0
0
1
0
1
SC16C654B/654DB internal registers
RHR
THR
IER
FCR
ISR
LCR
MCR
LSR
MSR
SPR
DLL
DLM
EFR
Xon-1
Xon-2
Xoff-1
Xoff-2
[5]
[2]
XX
XX
00
00
01
00
00
60
X0
FF
XX
XX
00
00
00
00
00
Table 8
The assigned bit functions are more fully defined in
[6]
[1]
details the assigned bit functions for the SC16C654B/654DB internal registers.
Bit 7
bit 7
bit 7
CTS
interrupt
[3]
RCVR
trigger
(MSB)
FIFOs
enabled
divisor
latch
enable
Clock
select
FIFO
data
error
CD
bit 7
bit 7
bit 15
Auto
CTS
bit 7
bit 15
bit 7
bit 15
[3]
5 V, 3.3 V and 2.5 V quad UART, 5 Mbit/s (max.) with 64-byte FIFOs
Bit 6
bit 6
bit 6
RTS
interrupt
[3]
RCVR
trigger
(LSB)
FIFOs
enabled
set
break
IR
enable
trans.
empty
RI
bit 6
bit 6
bit 14
Auto
RTS
bit 6
bit 14
bit 6
bit 14
Rev. 02 — 20 June 2005
[3]
Bit 5
bit 5
bit 5
Xoff
interrupt
TX
trigger
(MSB)
INT
priority
bit 4
set parity even
Xon
Any
trans.
holding
empty
DSR
bit 5
bit 5
bit 13
Special
char.
select
bit 5
bit 13
bit 5
bit 13
[3]
[3]
[3]
Bit 4
bit 4
bit 4
Sleep
mode
TX trigger
(LSB)
INT
priority
bit 3
parity
loop back OP2, INTx
break
interrupt
CTS
bit 4
bit 4
bit 12
Enable
IER[4:7],
ISR[4:5],
FCR[4:5],
MCR[5:7]
bit 4
bit 12
bit 4
bit 12
[3]
[3]
SC16C654B/654DB
Bit 3
bit 3
bit 3
modem
status
interrupt
DMA
mode
select
INT
priority
bit 2
parity
enable
enable
framing
error
bit 3
bit 3
bit 11
Cont-3 Tx,
Rx Control
bit 3
bit 11
bit 3
bit 11
CD
Section 7.1
[4]
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Bit 2
bit 2
bit 2
receive
line status
interrupt
XMIT
FIFO reset
INT
priority
bit 1
stop bits
OP1
parity
error
bit 2
bit 2
bit 10
Cont-2 Tx,
Rx Control
bit 2
bit 10
bit 2
bit 10
RI
through
Bit 1
bit 1
bit 1
transmit
holding
register
RCVR
FIFO
reset
INT
priority
bit 0
word
length
bit 1
RTS
overrun
error
bit 1
bit 1
bit 9
Cont-1
Tx, Rx
Control
bit 1
bit 9
bit 1
bit 9
Section
DSR
7.11.
Bit 0
bit 0
bit 0
receive
holding
register
FIFO
enable
INT
status
word
length
bit 0
DTR
receive
data
ready
bit 0
bit 0
bit 8
Cont-0
Tx, Rx
Control
bit 0
bit 8
bit 0
bit 8
CTS
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