ISP1504CBS,157 NXP Semiconductors, ISP1504CBS,157 Datasheet - Page 38
![RF Transceiver USB2.0 ULPI OTG](/photos/15/65/156561/hvqfn32_sml.jpg)
ISP1504CBS,157
Manufacturer Part Number
ISP1504CBS,157
Description
RF Transceiver USB2.0 ULPI OTG
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1504ABS118.pdf
(83 pages)
Specifications of ISP1504CBS,157
Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Pin Count
32
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Supply Voltage
1.65 V to 3.6 V
Mounting Style
SMD/SMT
Package / Case
HVQFN-32
Lead Free Status / RoHS Status
Compliant
Other names
935278309157 ISP1504CBS
NXP Semiconductors
ISP1504A_ISP1504C_3
Product data sheet
9.10.1 Full-speed or low-speed host-initiated suspend and resume
9.10 USB suspend and resume
Figure 18
suspend and sometime later initiates resume signaling to wake up the downstream
peripheral. Note that
LINESTATE updates.
The sequence of events for a host and a peripheral, both with ISP1504, is as follows:
1. Idle: Initially, the host and the peripheral are idle. The host has its 15 k pull-down
2. Suspend: When the peripheral sees no bus activity for 3 ms, it enters the suspend
3. Resume K: When the host wants to wake up the peripheral, it sets OPMODE[1:0] to
4. EOP: When STP is asserted, the ISP1504 on the host side automatically appends an
Fig 17. Preamble sequence
DATA[7:0]
resistors enabled (DP_PULLDOWN and DM_PULLDOWN are set to 1b) and 45
terminations disabled (TERMSELECT is set to 1b). The peripheral has the 1.5 k
pull-up resistor connected to DP for full-speed or DM for low-speed (TERMSELECT is
set to 1b).
state. The peripheral link places the PHY into low-power mode by clearing the
SUSPENDM bit in the Function Control register, causing the PHY to draw only
suspend current. The host may or may not be powered down.
10b and transmits a K for at least 20 ms. The peripheral link sees the resume K on
LINESTATE, and asserts STP to wake up the PHY.
EOP of two bits of SE0 at low-speed bit rate, followed by one bit of J. The ISP1504 on
the host side knows to add the EOP because DP_PULLDOWN and DM_PULLDOWN
are set to 1b for a host. After the EOP is completed, the host link sets OPMODE[1:0]
to 00b for normal operation. The peripheral link sees the EOP and also resumes
normal operation.
DP or DM
CLOCK
NXT
STP
DIR
DP and DM timing is not to scale.
illustrates how a host or a hub places a full-speed or low-speed peripheral into
Figure 18
FS SYNC
Rev. 03 — 7 April 2008
TXCMD (low-speed packet ID)
timing is not to scale, and does not show all RXCMD
PRE ID
FS
IDLE (min
4 FS bits)
ISP1504A; ISP1504C
LS SYNC
D0
ULPI HS USB OTG transceiver
LS PID
D1
LS D0
© NXP B.V. 2008. All rights reserved.
LS D1
004aaa714
37 of 82