ISP1507DBSUM STEricsson, ISP1507DBSUM Datasheet - Page 9

• Manufacturer Part Number: ISP1507DBSUM
• Manufacturer: STEricsson

Specifications of ISP1507DBSUM

• Lead Free Status / RoHS Status: Compliant

CD00222690
Product data sheet
7.10.1 DATA[7:0]
7.6.2 Session valid comparator
7.6.3 Session end comparator
7.10 Detailed description of pins
7.7 SRP charge and discharge resistors
7.8 Band gap reference voltage
7.9 Power-on reset
While it is possible for the external 5 V supply to use the ISP1507 internal A_VBUS_VLD
comparator, typical 5 V supplies must provide their own power fault indicator that can be
connected as an input to the ISP1507 FAULT pin.
The session valid comparator is a TTL-level input that determines when V
enough for a session to start. Peripherals, A-devices and B-devices use this comparator
to detect when a session is started. The A-device also uses this comparator to determine
when a session is completed. The session valid threshold of the ISP1507 is V
with a hysteresis of V
The ISP1507 session end comparator determines when V
session end threshold. The B-device uses this threshold to determine when a session has
ended. The session end threshold of the ISP1507 is V
The ISP1507 provides on-chip resistors for short-term charging and discharging of V
These are used by the B-device to request a session, prompting the A-device to restore
the V
previous session by setting the DISCHRG_VBUS register bit to logic 1 and waiting for
SESS_END to be logic 1. Then the B-device charges V
register bit to logic 1. The A-device sees that V
threshold and starts a session by turning on the V
The band gap circuit provides a stable internal voltage reference to bias the analog
circuitry. The band gap requires an accurate external reference resistor, R
between the RREF and GND pins. For details, see
The ISP1507 has an internal power-on reset circuit that resets all internal logic on
power-up. The ULPI is also reset at power-up.
Remark: When CLOCK starts toggling after power-up, the USB link must issue a reset
command over the ULPI bus to ensure correct operation of the ISP1507.
The ISP1507 is a Physical layer (PHY) containing a USB transceiver. DATA[7:0] is a
bidirectional data bus. The USB link must drive DATA[7:0] to LOW when the ULPI bus is
idle. When the link has data to transmit to the PHY, it drives a nonzero value.
Weak pull-down resistors are incorporated into DATA[7:0] pins as part of the interface
protect feature. For details, see
The data bus can be reconfigured to carry various data types, as given in
Section
BUS
9.
power. First, the B-device makes sure that V
hys(B_SESS_VLD)
Rev. 04 — 20 May 2010
Section
.
9.3.1.
ULPI HS USB host and peripheral transceiver
ISP1507C; ISP1507D
BUS
BUS
is charged above the session valid
Section
BUS
power.
B_SESS_END
BUS
BUS
is fully discharged from the
by setting the CHRG_VBUS
16.
is below the B-device
.
© ST-ERICSSON 2010. All rights reserved.
RREF
BUS
Section 8
B_SESS_VLD
, connected
is high
and
9 of 73
BUS
.
,